From patchwork Fri Feb 15 10:00:56 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mark Cave-Ayland X-Patchwork-Id: 158497 Delivered-To: patch@linaro.org Received: by 2002:a02:48:0:0:0:0:0 with SMTP id 69csp528811jaa; Fri, 15 Feb 2019 02:19:02 -0800 (PST) X-Google-Smtp-Source: AHgI3IY0T9zUpavzZq945X1OGIxKALpatWcgUYDHWAaeTeEc4smzMje30A5HAmPDZ/+9XgWEADnP X-Received: by 2002:a81:7a04:: with SMTP id v4mr7318142ywc.410.1550225942065; Fri, 15 Feb 2019 02:19:02 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1550225942; cv=none; d=google.com; s=arc-20160816; b=qlxMNoqRmr18Oq5hFVvJMq0/YJ23AGsJDQWRVBnOfyF8GXg1l9dCK9o1szQYI2JPeC WqT5YBiehp+s6tCLmXHJPeqp43xpLuxVQKlyyT0MH3fQodf4oO1srlQrwIhoZVZDKpCB qnAOUBLA9HrRO0/Ph+ToILjhUXQDwHZS3y6CXQQYkoqn2QxNOYuwBOxKLZb4tsObFs+a bdOD3zo0HO7DL02O4IHj3I0sf+e4+Mnc+oK7X6xg8XNIGODXvFqQEsCZZonACLuKqv83 4LW0tGHceTvrDbptC/GZ1JzdInvQ2kyrMvGWgcA5QDLmIrl/W+jtjjoU94iwTGCWQ6x6 64kg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:subject:references:in-reply-to :message-id:date:to:from; bh=w8UlEYpdVYvFofe6kq0yKsJDJhMNPjmobr2hyMXrmSs=; b=alrvG8HP6dXyMlyX+AZ4PZI5bNUD+usAbvzy81TFwCMZ3Ela9LM5FpIsXYpsnPFJk1 q1QanhiyFzz2zlIE2Cu12sEIdUuZL1StAmC8zPT+K6M4rNpRuPk9JmW+NzwvW/u6nGAp c1s6GnqEocZ+uqZRT25D/BQI0sHo0+5dF/GUW5l2QkCFhvJa7/Z5Z58obgqrnq6wCB1B DTAQPzqQEeghVVlnvNzqO8rtWt+w8D/p4Q46horOCE79DUP9QrZViwNby437AZqSEMnV jS65nWPPMzkp93EL6cnSyAXyhZ83DvOj/xKTqpcHbHgXO+qcyL8RLn1hs4upK2RhDfwt Gliw== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org" Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id r62si2962153ywf.326.2019.02.15.02.19.01 for (version=TLS1 cipher=AES128-SHA bits=128/128); Fri, 15 Feb 2019 02:19:02 -0800 (PST) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org" Received: from localhost ([127.0.0.1]:36012 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1guaaD-0001eg-DR for patch@linaro.org; Fri, 15 Feb 2019 05:19:01 -0500 Received: from eggs.gnu.org ([209.51.188.92]:55317) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1guaPo-00036A-HI for qemu-devel@nongnu.org; Fri, 15 Feb 2019 05:08:17 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1guaPm-0002aL-TE for qemu-devel@nongnu.org; Fri, 15 Feb 2019 05:08:16 -0500 Received: from chuckie.co.uk ([82.165.15.123]:38837 helo=s16892447.onlinehome-server.info) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1guaPm-0002ZC-NL; Fri, 15 Feb 2019 05:08:14 -0500 Received: from host86-133-194-245.range86-133.btcentralplus.com ([86.133.194.245] helo=kentang.home) by s16892447.onlinehome-server.info with esmtpsa (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.76) (envelope-from ) id 1guaJi-00027S-8o; Fri, 15 Feb 2019 10:01:59 +0000 From: Mark Cave-Ayland To: qemu-devel@nongnu.org, qemu-ppc@nongnu.org, david@gibson.dropbear.id.au, richard.henderson@linaro.org Date: Fri, 15 Feb 2019 10:00:56 +0000 Message-Id: <20190215100058.20015-16-mark.cave-ayland@ilande.co.uk> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20190215100058.20015-1-mark.cave-ayland@ilande.co.uk> References: <20190215100058.20015-1-mark.cave-ayland@ilande.co.uk> X-SA-Exim-Connect-IP: 86.133.194.245 X-SA-Exim-Mail-From: mark.cave-ayland@ilande.co.uk X-SA-Exim-Version: 4.2.1 (built Sun, 08 Jan 2012 02:45:44 +0000) X-SA-Exim-Scanned: Yes (on s16892447.onlinehome-server.info) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x X-Received-From: 82.165.15.123 Subject: [Qemu-devel] [PATCH 15/17] target/ppc: Split out VSCR_SAT to a vector field X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" From: Richard Henderson Change the representation of VSCR_SAT such that it is easy to set from vector code. Signed-off-by: Richard Henderson Acked-by: David Gibson --- target/ppc/cpu.h | 4 +++- target/ppc/int_helper.c | 11 ++++++++--- 2 files changed, 11 insertions(+), 4 deletions(-) -- 2.11.0 diff --git a/target/ppc/cpu.h b/target/ppc/cpu.h index a62f628d28..171ec9739d 100644 --- a/target/ppc/cpu.h +++ b/target/ppc/cpu.h @@ -1051,10 +1051,12 @@ struct CPUPPCState { /* Special purpose registers */ target_ulong spr[1024]; ppc_spr_t spr_cb[1024]; - /* Vector status and control register */ + /* Vector status and control register, minus VSCR_SAT. */ uint32_t vscr; /* VSX registers (including FP and AVR) */ ppc_vsr_t vsr[64] QEMU_ALIGNED(16); + /* Non-zero if and only if VSCR_SAT should be set. */ + ppc_vsr_t vscr_sat QEMU_ALIGNED(16); /* SPE registers */ uint64_t spe_acc; uint32_t spe_fscr; diff --git a/target/ppc/int_helper.c b/target/ppc/int_helper.c index 1d8a4b530b..6ad596a08b 100644 --- a/target/ppc/int_helper.c +++ b/target/ppc/int_helper.c @@ -459,18 +459,23 @@ void helper_lvsr(ppc_avr_t *r, target_ulong sh) void helper_mtvscr(CPUPPCState *env, uint32_t vscr) { - env->vscr = vscr; + env->vscr = vscr & ~(1u << VSCR_SAT); + /* Which bit we set is completely arbitrary, but clear the rest. */ + env->vscr_sat.u64[0] = vscr & (1u << VSCR_SAT); + env->vscr_sat.u64[1] = 0; set_flush_to_zero((vscr >> VSCR_NJ) & 1, &env->vec_status); } uint32_t helper_mfvscr(CPUPPCState *env) { - return env->vscr; + uint32_t sat = (env->vscr_sat.u64[0] | env->vscr_sat.u64[1]) != 0; + return env->vscr | (sat << VSCR_SAT); } static inline void set_vscr_sat(CPUPPCState *env) { - env->vscr |= 1 << VSCR_SAT; + /* The choice of non-zero value is arbitrary. */ + env->vscr_sat.u32[0] = 1; } void helper_vaddcuw(ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b)