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[97.113.188.82]) by smtp.gmail.com with ESMTPSA id f67sm1452522pfc.141.2019.02.21.22.05.07 for (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Thu, 21 Feb 2019 22:05:08 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Date: Thu, 21 Feb 2019 22:05:04 -0800 Message-Id: <20190222060504.17715-3-richard.henderson@linaro.org> X-Mailer: git-send-email 2.17.2 In-Reply-To: <20190222060504.17715-1-richard.henderson@linaro.org> References: <20190222060504.17715-1-richard.henderson@linaro.org> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:4864:20::536 Subject: [Qemu-devel] [PATCH 2/2] target/hppa: Optimize blr r0,rn X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" We can eliminate an extra TB in this case, which merely loads a "return address" into rn. Signed-off-by: Richard Henderson --- target/hppa/translate.c | 16 ++++++++++------ 1 file changed, 10 insertions(+), 6 deletions(-) -- 2.17.2 diff --git a/target/hppa/translate.c b/target/hppa/translate.c index dad8ce563c..dc5636fe94 100644 --- a/target/hppa/translate.c +++ b/target/hppa/translate.c @@ -3488,12 +3488,16 @@ static bool trans_b_gate(DisasContext *ctx, arg_b_gate *a) static bool trans_blr(DisasContext *ctx, arg_blr *a) { - TCGv_reg tmp = get_temp(ctx); - - tcg_gen_shli_reg(tmp, load_gpr(ctx, a->x), 3); - tcg_gen_addi_reg(tmp, tmp, ctx->iaoq_f + 8); - /* The computation here never changes privilege level. */ - return do_ibranch(ctx, tmp, a->l, a->n); + if (a->x) { + TCGv_reg tmp = get_temp(ctx); + tcg_gen_shli_reg(tmp, load_gpr(ctx, a->x), 3); + tcg_gen_addi_reg(tmp, tmp, ctx->iaoq_f + 8); + /* The computation here never changes privilege level. */ + return do_ibranch(ctx, tmp, a->l, a->n); + } else { + /* BLR R0,RX is a good way to load PC+8 into RX. */ + return do_dbranch(ctx, ctx->iaoq_f + 8, a->l, a->n); + } } static bool trans_bv(DisasContext *ctx, arg_bv *a)