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[209.51.188.17]) by mx.google.com with ESMTPS id o41si5447023qtb.92.2019.09.27.12.44.55 for (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Fri, 27 Sep 2019 12:44:56 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=VACet4xW; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1]:56790 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1iDwAh-0007PO-1f for patch@linaro.org; Fri, 27 Sep 2019 15:44:55 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:46545) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1iDw5j-0003Jz-Uo for qemu-devel@nongnu.org; Fri, 27 Sep 2019 15:39:51 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1iDw5h-0006P9-2N for qemu-devel@nongnu.org; Fri, 27 Sep 2019 15:39:47 -0400 Received: from mail-pl1-x643.google.com ([2607:f8b0:4864:20::643]:46314) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1iDw5g-0006Mj-K0 for qemu-devel@nongnu.org; Fri, 27 Sep 2019 15:39:44 -0400 Received: by mail-pl1-x643.google.com with SMTP id q24so1462443plr.13 for ; Fri, 27 Sep 2019 12:39:44 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=S7TwNfUbxZvOxX36TdLooJsySBiwUy20PbV1xw5QyNY=; b=VACet4xWLPtmVsJUjLes8xV7QrVTQ7KilCF+gMzuGu0ReWcOty3yE6f+eCfqSgYlP9 8pktspZcdYSk+F5a2EKrtaQVIOYmfwA0i+kU3JjIi2ibyBQRM590vWCpx4iPU1zKTFTK EAHMb93wA+cFVyTk+Vhxkc2Dn7FVo8eaMGuWE93XUtayjGGT/BqEdKQVG/qWc3wOUMTI 0eJRDsU29LhlFu+GOYH59Q5kTv6m/+Yv66OGHKl2TyO+LY9o/rJT3bG/CcMk357ACBMA EJ+vF6mS6kQs029Vljz6iHJnlinEIZyB3k3ICjN0qG88kMoLKyiHcO1vr5ID844x1J4Y VUyg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=S7TwNfUbxZvOxX36TdLooJsySBiwUy20PbV1xw5QyNY=; b=JqdzqVGQKE8ru6Rq049RNG1G/8n1G2PS12hnX1pzD6g4goa/xv0zPn3mV0MZv5qrmB Ge16kBofSRSGEK4oygo191TQ/XL5hPAI1Lls5gJP0CKrJh6XGSdYwHPvRM5StLLLZb7P ZsTv6hTGVY/pvkN/Nm4deFpUS0Hjwgf1dx/oXBP5RghGPMUd+lE+7mKYIUmqiatPRUd9 IobMpHFiaV+qoTlSIAQkt8qrISwAX2qbcGlxi5Op6XYSLdTjJ9CVePGi8KgoQh3XdSaS P4Ahb1yasLZYFPzuC76ILhcDj+/fxevOh/X2A/hd7gNPLUT/8pT+sjakfrFiW7qdySxh qsjA== X-Gm-Message-State: APjAAAVue1DMnUm2rjd/eIcXPNQEG58zkyJGOaQyIzGEpI314oW3KVNQ QEBOUkK1+FwGY5S91x4jcr4LXO62GuU= X-Received: by 2002:a17:902:9a0b:: with SMTP id v11mr6491744plp.202.1569613182765; Fri, 27 Sep 2019 12:39:42 -0700 (PDT) Received: from localhost.localdomain ([12.206.46.62]) by smtp.gmail.com with ESMTPSA id 192sm3676403pfb.110.2019.09.27.12.39.41 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 27 Sep 2019 12:39:42 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v4 07/18] target/s390x: Return exception from mmu_translate_real Date: Fri, 27 Sep 2019 12:39:14 -0700 Message-Id: <20190927193925.23567-8-richard.henderson@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20190927193925.23567-1-richard.henderson@linaro.org> References: <20190927193925.23567-1-richard.henderson@linaro.org> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:4864:20::643 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: qemu-s390x@nongnu.org, david@redhat.com Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" Do not raise the exception directly within mmu_translate_real, but pass it back so that caller may do so. Reviewed-by: David Hildenbrand Signed-off-by: Richard Henderson --- target/s390x/internal.h | 2 +- target/s390x/excp_helper.c | 4 ++-- target/s390x/mmu_helper.c | 15 ++++++--------- 3 files changed, 9 insertions(+), 12 deletions(-) -- 2.17.1 diff --git a/target/s390x/internal.h b/target/s390x/internal.h index c243fa725b..c4388aaf23 100644 --- a/target/s390x/internal.h +++ b/target/s390x/internal.h @@ -362,7 +362,7 @@ void probe_write_access(CPUS390XState *env, uint64_t addr, uint64_t len, int mmu_translate(CPUS390XState *env, target_ulong vaddr, int rw, uint64_t asc, target_ulong *raddr, int *flags, bool exc); int mmu_translate_real(CPUS390XState *env, target_ulong raddr, int rw, - target_ulong *addr, int *flags); + target_ulong *addr, int *flags, uint64_t *tec); /* misc_helper.c */ diff --git a/target/s390x/excp_helper.c b/target/s390x/excp_helper.c index ab2ed47fef..906b87c071 100644 --- a/target/s390x/excp_helper.c +++ b/target/s390x/excp_helper.c @@ -147,8 +147,8 @@ bool s390_cpu_tlb_fill(CPUState *cs, vaddr address, int size, if (!(env->psw.mask & PSW_MASK_64)) { vaddr &= 0x7fffffff; } - fail = mmu_translate_real(env, vaddr, access_type, &raddr, &prot); - excp = 0; /* exception already raised */ + excp = mmu_translate_real(env, vaddr, access_type, &raddr, &prot, &tec); + fail = excp; } else { g_assert_not_reached(); } diff --git a/target/s390x/mmu_helper.c b/target/s390x/mmu_helper.c index a142663b0f..48ebc62497 100644 --- a/target/s390x/mmu_helper.c +++ b/target/s390x/mmu_helper.c @@ -555,15 +555,11 @@ void s390_cpu_virt_mem_handle_exc(S390CPU *cpu, uintptr_t ra) * @param rw 0 = read, 1 = write, 2 = code fetch * @param addr the translated address is stored to this pointer * @param flags the PAGE_READ/WRITE/EXEC flags are stored to this pointer - * @return 0 if the translation was successful, < 0 if a fault occurred + * @return 0 = success, != 0, the exception to raise */ int mmu_translate_real(CPUS390XState *env, target_ulong raddr, int rw, - target_ulong *addr, int *flags) + target_ulong *addr, int *flags, uint64_t *tec) { - /* Code accesses have an undefined ilc, let's use 2 bytes. */ - const int ilen = (rw == MMU_INST_FETCH) ? 2 : ILEN_AUTO; - uint64_t tec = (raddr & TARGET_PAGE_MASK) | - (rw == MMU_DATA_STORE ? FS_WRITE : FS_READ); const bool lowprot_enabled = env->cregs[0] & CR0_LOWPROT; *flags = PAGE_READ | PAGE_WRITE | PAGE_EXEC; @@ -572,9 +568,10 @@ int mmu_translate_real(CPUS390XState *env, target_ulong raddr, int rw, *flags |= PAGE_WRITE_INV; if (is_low_address(raddr) && rw == MMU_DATA_STORE) { /* LAP sets bit 56 */ - tec |= 0x80; - trigger_access_exception(env, PGM_PROTECTION, ilen, tec); - return -EACCES; + *tec = (raddr & TARGET_PAGE_MASK) + | (rw == MMU_DATA_STORE ? FS_WRITE : FS_READ) + | 0x80; + return PGM_PROTECTION; } }