From patchwork Mon Sep 30 20:21:09 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 174777 Delivered-To: patch@linaro.org Received: by 2002:a92:7e96:0:0:0:0:0 with SMTP id q22csp7609224ill; Mon, 30 Sep 2019 13:23:21 -0700 (PDT) X-Google-Smtp-Source: APXvYqyU+az+AJm33nuu0QfGLPm1d/tOPIBxGxzP//v6peKaTtLcD1BTUZvoTjeQNmUjruRKyD1r X-Received: by 2002:a37:7fc7:: with SMTP id a190mr2092361qkd.351.1569875001236; Mon, 30 Sep 2019 13:23:21 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1569875001; cv=none; d=google.com; s=arc-20160816; b=bvLFVXHzDdJnVmTzMgV2sohSMhYHBuvkt/NJBI0IY+JFdD7m8lqdQxKAWH8qzdlbmD l8E++sTbQcwerH/va28QfS1tmHTqN3MbhTdJw7OPnscXjq9h2qFyox7/p3yx0lbUd0ZM Kl91XpDSdZh0Z+ECN11Bh2FG614jtdLgKIW3YAvfYKbe4ckfWJPbkrdCft0fu+R+uadz /xL70lqdQOsntZ3GlXJHzyLgzunJDqaJKab9+MfAtGC5zbJ0+wRBYUezb4XZmig6aAXn NXULPo34hLVQoLJI4X/f5VJRzEvSGLln4i9sCgOGqMuanygGpZEjQ5icEK4zK/o6H8OT K3Tw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:references:in-reply-to :message-id:date:subject:to:from:dkim-signature; bh=jt4e+35BxFKMSgr66A8AIeO8Hu+tEBevMhkRfs63fGs=; b=tVdGvAAevADbUtQEIe7wOhMBdw9V/85JRNHoblkxMcISLymSqakI5KWNScpD1MmEbv 68pemU7dxUkZggY44KwhgLk9zDSmgj80NN2sizZencVkbmkbOtqLpo+jS+1o5pr3q6wr rpmRh1GLJwV/XKSXhDqK05msAz3f975f5NgYuu/EqzJOuTzfLr/R4eqdq55EnGDGKxOb GlECHVdu4MWE7Y0uDvgC6a0UBmyYES1paB7KB/3bCJ08cClYaqD33lWGSqx8/cuUeOHi tnRTCAkqzBQPbz9aG9ovg//udWB+4sDO4fJwlOW5QW5+wkxVuMyBHR3qywtMlwoK87uc 8xEg== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=V5IRgzIz; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id p48si12967173qtb.61.2019.09.30.13.23.21 for (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Mon, 30 Sep 2019 13:23:21 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=V5IRgzIz; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1]:56708 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1iF2CU-0004bW-Ut for patch@linaro.org; Mon, 30 Sep 2019 16:23:20 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:44825) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1iF2Aq-0004XN-UE for qemu-devel@nongnu.org; Mon, 30 Sep 2019 16:21:37 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1iF2Ap-0005Yt-R4 for qemu-devel@nongnu.org; Mon, 30 Sep 2019 16:21:36 -0400 Received: from mail-pf1-x443.google.com ([2607:f8b0:4864:20::443]:33409) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1iF2Ap-0005Ya-LJ for qemu-devel@nongnu.org; Mon, 30 Sep 2019 16:21:35 -0400 Received: by mail-pf1-x443.google.com with SMTP id q10so6246138pfl.0 for ; Mon, 30 Sep 2019 13:21:35 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=jt4e+35BxFKMSgr66A8AIeO8Hu+tEBevMhkRfs63fGs=; b=V5IRgzIzQiJ+TOivhjXM/0za0vmdkwluRjlCZS+5xKof3oAfj8jxuug4ARSi7KOFFB m9nDrQJeceH5WRmqAbCgWzmSF5VvKpQd9m4u7/d8uRmruuNMCFlV6J/jAX6pyGyTnqPw aN2y5n4oHdJokCwWh4TUBMjcqChEsxTb6zoiyzhzUqFwUMVTB++/SDNlTzKYxK9Z2fAd 38aji2WhXdoMvF5NOPH5kO0JF+KkJ4JwlgHQZgxDFsMPjn0VKq3Pxpe6rmm88InZMI7/ hjuVOICzBrV3bH6T8WIevKSM6koKLupQ5ZWaELOduzoR2Csq0bbwaKkVxs37+/0NE5ay PtMA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=jt4e+35BxFKMSgr66A8AIeO8Hu+tEBevMhkRfs63fGs=; b=BIeYCPVcTKPtU21VI3SEeBQDZ7kI1RIHIpTSca8In6qCdBgw9VppcIO9bRVMb2enfI y+7Jw6O8Z8n3TRDFGD19iQ/8FFiiVCgO+dl4kEX/CGJRmyK5bTkWRaVzI9DaDiDZww7S /PeANbakTwfNzd9hAUTxnwA7QqS+HsASdIwhYxca/HxgzUzjkMCUIshvg/GJiM5y5U7B T+oAqD305FpBJMrOqOUWVOSp/hYgXRzJl+fmVVxEuuqbBGzY9xxRgxRL+wDlAEvpu+TD MK8BgCkpTZDaDPCrcvn5MTsqBd1vXMlAGsM3LE2Ix0ePmBHhIiTSsFiVjHsxUwNbNTlY T2Uw== X-Gm-Message-State: APjAAAU52y1hOwDuXJ1QXLjozugnJuZAnKpO196o2ZJ6mHxwp7ap4W+t vanlqO8yKfYaE06HfPoiGR8LIf67rYc= X-Received: by 2002:a63:9d04:: with SMTP id i4mr13621881pgd.254.1569874894373; Mon, 30 Sep 2019 13:21:34 -0700 (PDT) Received: from localhost.localdomain (97-113-7-119.tukw.qwest.net. [97.113.7.119]) by smtp.gmail.com with ESMTPSA id r28sm15336802pfg.62.2019.09.30.13.21.33 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 30 Sep 2019 13:21:33 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v7 06/22] tcg/ppc: Replace HAVE_ISEL macro with a variable Date: Mon, 30 Sep 2019 13:21:09 -0700 Message-Id: <20190930202125.21064-7-richard.henderson@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20190930202125.21064-1-richard.henderson@linaro.org> References: <20190930202125.21064-1-richard.henderson@linaro.org> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:4864:20::443 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: mark.cave-ayland@ilande.co.uk, amarkovic@wavecomp.com, hsp.cat7@gmail.com Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" Previously we've been hard-coding knowledge that Power7 has ISEL, but it was an optional instruction before that. Use the AT_HWCAP2 bit, when present, to properly determine support. Signed-off-by: Richard Henderson --- tcg/ppc/tcg-target.inc.c | 17 ++++++++++++----- 1 file changed, 12 insertions(+), 5 deletions(-) -- 2.17.1 diff --git a/tcg/ppc/tcg-target.inc.c b/tcg/ppc/tcg-target.inc.c index 7cb0002c14..db28ae7eb1 100644 --- a/tcg/ppc/tcg-target.inc.c +++ b/tcg/ppc/tcg-target.inc.c @@ -65,8 +65,7 @@ static tcg_insn_unit *tb_ret_addr; TCGPowerISA have_isa; - -#define HAVE_ISEL have_isa_2_06 +static bool have_isel; #ifndef CONFIG_SOFTMMU #define TCG_GUEST_BASE_REG 30 @@ -1100,7 +1099,7 @@ static void tcg_out_setcond(TCGContext *s, TCGType type, TCGCond cond, /* If we have ISEL, we can implement everything with 3 or 4 insns. All other cases below are also at least 3 insns, so speed up the code generator by not considering them and always using ISEL. */ - if (HAVE_ISEL) { + if (have_isel) { int isel, tab; tcg_out_cmp(s, cond, arg1, arg2, const_arg2, 7, type); @@ -1203,7 +1202,7 @@ static void tcg_out_movcond(TCGContext *s, TCGType type, TCGCond cond, tcg_out_cmp(s, cond, c1, c2, const_c2, 7, type); - if (HAVE_ISEL) { + if (have_isel) { int isel = tcg_to_isel[cond]; /* Swap the V operands if the operation indicates inversion. */ @@ -1247,7 +1246,7 @@ static void tcg_out_cntxz(TCGContext *s, TCGType type, uint32_t opc, } else { tcg_out_cmp(s, TCG_COND_EQ, a1, 0, 1, 7, type); /* Note that the only other valid constant for a2 is 0. */ - if (HAVE_ISEL) { + if (have_isel) { tcg_out32(s, opc | RA(TCG_REG_R0) | RS(a1)); tcg_out32(s, tcg_to_isel[TCG_COND_EQ] | TAB(a0, a2, TCG_REG_R0)); } else if (!const_a2 && a0 == a2) { @@ -2795,6 +2794,14 @@ static void tcg_target_init(TCGContext *s) } #endif +#ifdef PPC_FEATURE2_HAS_ISEL + /* Prefer explicit instruction from the kernel. */ + have_isel = (hwcap2 & PPC_FEATURE2_HAS_ISEL) != 0; +#else + /* Fall back to knowing Power7 (2.06) has ISEL. */ + have_isel = have_isa_2_06; +#endif + tcg_target_available_regs[TCG_TYPE_I32] = 0xffffffff; tcg_target_available_regs[TCG_TYPE_I64] = 0xffffffff;