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[172.254.253.50]) by smtp.gmail.com with ESMTPSA id t13sm8271823qtn.18.2019.10.23.08.49.52 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 23 Oct 2019 08:49:52 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH] cputlb: Fix tlb_vaddr_to_host Date: Wed, 23 Oct 2019 11:49:52 -0400 Message-Id: <20191023154952.30731-1-richard.henderson@linaro.org> X-Mailer: git-send-email 2.17.1 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:4864:20::843 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: david@redhat.com Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" Using uintptr_t instead of target_ulong meant that, for 64-bit guest and 32-bit host, we truncated the guest address comparator and so may not hit the tlb when we should. Fixes: 4811e9095c0 Signed-off-by: Richard Henderson --- Fixes aarch64 emulation on arm32 host, after our recent changes to tlb probing. r~ --- accel/tcg/cputlb.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) -- 2.17.1 Reviewed-by: Philippe Mathieu-Daudé diff --git a/accel/tcg/cputlb.c b/accel/tcg/cputlb.c index 6f4194df96..5eebddcca8 100644 --- a/accel/tcg/cputlb.c +++ b/accel/tcg/cputlb.c @@ -1189,7 +1189,7 @@ void *tlb_vaddr_to_host(CPUArchState *env, abi_ptr addr, MMUAccessType access_type, int mmu_idx) { CPUTLBEntry *entry = tlb_entry(env, mmu_idx, addr); - uintptr_t tlb_addr, page; + target_ulong tlb_addr, page; size_t elt_ofs; switch (access_type) {