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[83.57.170.65]) by smtp.gmail.com with ESMTPSA id n17sm23201953wrw.0.2020.09.06.18.15.44 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 06 Sep 2020 18:15:45 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Subject: [PATCH v2 1/2] hw/mips/mipssim: Use MMIO serial device on fake ISA I/O Date: Mon, 7 Sep 2020 03:15:37 +0200 Message-Id: <20200907011538.818996-2-philmd@redhat.com> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20200907011538.818996-1-philmd@redhat.com> References: <20200907011538.818996-1-philmd@redhat.com> MIME-Version: 1.0 Authentication-Results: relay.mimecast.com; auth=pass smtp.auth=CUSA124A263 smtp.mailfrom=philmd@redhat.com X-Mimecast-Spam-Score: 0.002 X-Mimecast-Originator: redhat.com Received-SPF: pass client-ip=205.139.110.61; envelope-from=philmd@redhat.com; helo=us-smtp-delivery-1.mimecast.com X-detected-operating-system: by eggs.gnu.org: First seen = 2020/09/06 21:15:49 X-ACL-Warn: Detected OS = Linux 2.2.x-3.x [generic] [fuzzy] X-Spam_score_int: -21 X-Spam_score: -2.2 X-Spam_bar: -- X-Spam_report: (-2.2 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.099, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H3=-0.01, RCVD_IN_MSPIKE_WL=-0.01, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , Aleksandar Rikalo , "Michael S. Tsirkin" , Jiaxun Yang , Aleksandar Markovic , =?utf-8?q?Marc-Andr=C3=A9_Lureau?= , Paolo Bonzini , =?utf-8?q?Philippe_Mathieu-Daud?= =?utf-8?b?w6k=?= , Aurelien Jarno Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" The 'mipssim' is not a real hardware, it is a simulator. There is an ISA MMIO space mapped at 0x1fd00000, however this is not a real ISA bus (no ISA IRQ). So can not use the TYPE_ISA_SERIAL device... Instead we have been using a plain MMIO device, but named it IO. TYPE_SERIAL_IO is a superset of TYPE_SERIAL_MM, using regshift=0 and endianness=DEVICE_LITTLE_ENDIAN. Directly use the TYPE_SERIAL_MM device, enforcing the regshift/endianness values. 'regshift' default is already '0'. 'endianness' is meaningless for 8-bit accesses. This change breaks migration back compatibility, but this is not an issue for the mipssim machine. Suggested-by: Peter Maydell Signed-off-by: Philippe Mathieu-Daudé --- hw/mips/mipssim.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/hw/mips/mipssim.c b/hw/mips/mipssim.c index 1b3b7622035..5d4ad74828d 100644 --- a/hw/mips/mipssim.c +++ b/hw/mips/mipssim.c @@ -216,10 +216,11 @@ mips_mipssim_init(MachineState *machine) * MIPS CPU INT2, which is interrupt 4. */ if (serial_hd(0)) { - DeviceState *dev = qdev_new(TYPE_SERIAL_IO); + DeviceState *dev = qdev_new(TYPE_SERIAL_MM); qdev_prop_set_chr(dev, "chardev", serial_hd(0)); - qdev_set_legacy_instance_id(dev, 0x3f8, 2); + qdev_prop_set_uint8(dev, "regshift", 0); + qdev_prop_set_uint8(dev, "endianness", DEVICE_LITTLE_ENDIAN); sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, env->irq[4]); sysbus_add_io(SYS_BUS_DEVICE(dev), 0x3f8,