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[83.57.170.65]) by smtp.gmail.com with ESMTPSA id z15sm7347660wrv.94.2020.09.10.00.02.00 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 10 Sep 2020 00:02:01 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Subject: [PATCH 5/6] hw/pci-host/q35: Rename PCI 'black hole as '(memory) hole' Date: Thu, 10 Sep 2020 09:01:30 +0200 Message-Id: <20200910070131.435543-6-philmd@redhat.com> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20200910070131.435543-1-philmd@redhat.com> References: <20200910070131.435543-1-philmd@redhat.com> MIME-Version: 1.0 Authentication-Results: relay.mimecast.com; auth=pass smtp.auth=CUSA124A263 smtp.mailfrom=philmd@redhat.com X-Mimecast-Spam-Score: 0.003 X-Mimecast-Originator: redhat.com Received-SPF: pass client-ip=205.139.110.120; envelope-from=philmd@redhat.com; helo=us-smtp-1.mimecast.com X-detected-operating-system: by eggs.gnu.org: First seen = 2020/09/10 01:23:25 X-ACL-Warn: Detected OS = Linux 2.2.x-3.x [generic] [fuzzy] X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H2=-0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Laurent Vivier , Peter Maydell , Thomas Huth , Alistair Francis , Eduardo Habkost , kvm@vger.kernel.org, "Michael S. Tsirkin" , Andrew Jeffery , =?utf-8?q?Philippe_Mathieu-Daud?= =?utf-8?b?w6k=?= , Jason Wang , Marcelo Tosatti , Joel Stanley , qemu-trivial@nongnu.org, qemu-arm@nongnu.org, =?utf-8?b?Q8OpZHJpYyBM?= =?utf-8?q?e_Goater?= , Paolo Bonzini , "Edgar E. Iglesias" , =?utf-8?q?Alex_Benn=C3=A9e?= , Richard Henderson Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" In order to use inclusive terminology, rename "blackhole" as "(memory)hole". Signed-off-by: Philippe Mathieu-Daudé --- include/hw/pci-host/q35.h | 4 ++-- hw/pci-host/q35.c | 38 +++++++++++++++++++------------------- tests/qtest/q35-test.c | 2 +- 3 files changed, 22 insertions(+), 22 deletions(-) diff --git a/include/hw/pci-host/q35.h b/include/hw/pci-host/q35.h index 070305f83df..0fb90aca18b 100644 --- a/include/hw/pci-host/q35.h +++ b/include/hw/pci-host/q35.h @@ -48,8 +48,8 @@ typedef struct MCHPCIState { PAMMemoryRegion pam_regions[13]; MemoryRegion smram_region, open_high_smram; MemoryRegion smram, low_smram, high_smram; - MemoryRegion tseg_blackhole, tseg_window; - MemoryRegion smbase_blackhole, smbase_window; + MemoryRegion tseg_hole, tseg_window; + MemoryRegion smbase_hole, smbase_window; bool has_smram_at_smbase; Range pci_hole; uint64_t below_4g_mem_size; diff --git a/hw/pci-host/q35.c b/hw/pci-host/q35.c index b67cb9c29f8..21f58ccfa28 100644 --- a/hw/pci-host/q35.c +++ b/hw/pci-host/q35.c @@ -266,20 +266,20 @@ static const TypeInfo q35_host_info = { * MCH D0:F0 */ -static uint64_t blackhole_read(void *ptr, hwaddr reg, unsigned size) +static uint64_t memoryhole_read(void *ptr, hwaddr reg, unsigned size) { return 0xffffffff; } -static void blackhole_write(void *opaque, hwaddr addr, uint64_t val, +static void memoryhole_write(void *opaque, hwaddr addr, uint64_t val, unsigned width) { /* nothing */ } -static const MemoryRegionOps blackhole_ops = { - .read = blackhole_read, - .write = blackhole_write, +static const MemoryRegionOps memoryhole_ops = { + .read = memoryhole_read, + .write = memoryhole_write, .endianness = DEVICE_NATIVE_ENDIAN, .valid.min_access_size = 1, .valid.max_access_size = 4, @@ -393,12 +393,12 @@ static void mch_update_smram(MCHPCIState *mch) } else { tseg_size = 0; } - memory_region_del_subregion(mch->system_memory, &mch->tseg_blackhole); - memory_region_set_enabled(&mch->tseg_blackhole, tseg_size); - memory_region_set_size(&mch->tseg_blackhole, tseg_size); + memory_region_del_subregion(mch->system_memory, &mch->tseg_hole); + memory_region_set_enabled(&mch->tseg_hole, tseg_size); + memory_region_set_size(&mch->tseg_hole, tseg_size); memory_region_add_subregion_overlap(mch->system_memory, mch->below_4g_mem_size - tseg_size, - &mch->tseg_blackhole, 1); + &mch->tseg_hole, 1); memory_region_set_enabled(&mch->tseg_window, tseg_size); memory_region_set_size(&mch->tseg_window, tseg_size); @@ -456,7 +456,7 @@ static void mch_update_smbase_smram(MCHPCIState *mch) } else { lck = false; } - memory_region_set_enabled(&mch->smbase_blackhole, lck); + memory_region_set_enabled(&mch->smbase_hole, lck); memory_region_set_enabled(&mch->smbase_window, lck); memory_region_transaction_commit(); } @@ -601,13 +601,13 @@ static void mch_realize(PCIDevice *d, Error **errp) memory_region_set_enabled(&mch->high_smram, true); memory_region_add_subregion(&mch->smram, 0xfeda0000, &mch->high_smram); - memory_region_init_io(&mch->tseg_blackhole, OBJECT(mch), - &blackhole_ops, NULL, - "tseg-blackhole", 0); - memory_region_set_enabled(&mch->tseg_blackhole, false); + memory_region_init_io(&mch->tseg_hole, OBJECT(mch), + &memoryhole_ops, NULL, + "tseg-hole", 0); + memory_region_set_enabled(&mch->tseg_hole, false); memory_region_add_subregion_overlap(mch->system_memory, mch->below_4g_mem_size, - &mch->tseg_blackhole, 1); + &mch->tseg_hole, 1); memory_region_init_alias(&mch->tseg_window, OBJECT(mch), "tseg-window", mch->ram_memory, mch->below_4g_mem_size, 0); @@ -619,13 +619,13 @@ static void mch_realize(PCIDevice *d, Error **errp) * This is not what hardware does, so it's QEMU specific hack. * See commit message for details. */ - memory_region_init_io(&mch->smbase_blackhole, OBJECT(mch), &blackhole_ops, - NULL, "smbase-blackhole", + memory_region_init_io(&mch->smbase_hole, OBJECT(mch), &memoryhole_ops, + NULL, "smbase-hole", MCH_HOST_BRIDGE_SMBASE_SIZE); - memory_region_set_enabled(&mch->smbase_blackhole, false); + memory_region_set_enabled(&mch->smbase_hole, false); memory_region_add_subregion_overlap(mch->system_memory, MCH_HOST_BRIDGE_SMBASE_ADDR, - &mch->smbase_blackhole, 1); + &mch->smbase_hole, 1); memory_region_init_alias(&mch->smbase_window, OBJECT(mch), "smbase-window", mch->ram_memory, diff --git a/tests/qtest/q35-test.c b/tests/qtest/q35-test.c index b7cf1449906..7cddd0a7f61 100644 --- a/tests/qtest/q35-test.c +++ b/tests/qtest/q35-test.c @@ -231,7 +231,7 @@ static void test_smram_smbase_lock(void) qpci_config_writeb(pcidev, MCH_HOST_BRIDGE_F_SMBASE, i); g_assert(qpci_config_readb(pcidev, MCH_HOST_BRIDGE_F_SMBASE) == 0x02); - /* RAM access should go into black hole */ + /* RAM access should go into memory hole */ qtest_writeb(qts, SMBASE, SMRAM_TEST_PATTERN); g_assert_cmpint(qtest_readb(qts, SMBASE), ==, 0xff); }