Message ID | 20201012095804.3335117-21-f4bug@amsat.org |
---|---|
State | Superseded |
Headers | show
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[83.59.162.106]) by smtp.gmail.com with ESMTPSA id u15sm23953845wrm.77.2020.10.12.02.59.47 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 12 Oct 2020 02:59:47 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= <f4bug@amsat.org> To: qemu-devel@nongnu.org Subject: [PATCH v4 20/21] hw/mips/cps: Do not allow use without input clock Date: Mon, 12 Oct 2020 11:58:03 +0200 Message-Id: <20201012095804.3335117-21-f4bug@amsat.org> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20201012095804.3335117-1-f4bug@amsat.org> References: <20201012095804.3335117-1-f4bug@amsat.org> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 8bit Received-SPF: pass client-ip=2a00:1450:4864:20::342; envelope-from=philippe.mathieu.daude@gmail.com; helo=mail-wm1-x342.google.com X-detected-operating-system: by eggs.gnu.org: No matching host in p0f cache. That's all we know. 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Series |
hw/mips: Set CPU frequency
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expand
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diff --git a/hw/mips/cps.c b/hw/mips/cps.c index af7b58c4bdd..c624821315a 100644 --- a/hw/mips/cps.c +++ b/hw/mips/cps.c @@ -74,6 +74,11 @@ static void mips_cps_realize(DeviceState *dev, Error **errp) bool itu_present = false; bool saar_present = false; + if (!clock_get(s->clock)) { + error_setg(errp, "CPS input clock is not connected to an output clock"); + return; + } + for (i = 0; i < s->num_vp; i++) { cpu = MIPS_CPU(object_new(s->cpu_type));
Now than all QOM users provides the input clock, do not allow using a CPS without input clock connected. Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> --- hw/mips/cps.c | 5 +++++ 1 file changed, 5 insertions(+)