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[83.59.162.106]) by smtp.gmail.com with ESMTPSA id z17sm12422412wrr.93.2020.10.12.09.05.13 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 12 Oct 2020 09:05:13 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Subject: [PATCH 2/2] hw/mips/malta: Use clearer qdev style Date: Mon, 12 Oct 2020 18:05:03 +0200 Message-Id: <20201012160503.3472140-3-f4bug@amsat.org> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20201012160503.3472140-1-f4bug@amsat.org> References: <20201012160503.3472140-1-f4bug@amsat.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::442; envelope-from=philippe.mathieu.daude@gmail.com; helo=mail-wr1-x442.google.com X-detected-operating-system: by eggs.gnu.org: No matching host in p0f cache. That's all we know. X-Spam_score_int: -14 X-Spam_score: -1.5 X-Spam_bar: - X-Spam_report: (-1.5 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FORGED_FROMDOMAIN=0.249, FREEMAIL_FROM=0.001, HEADER_FROM_DIFFERENT_DOMAINS=0.25, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Aleksandar Markovic , Aleksandar Rikalo , Aurelien Jarno , =?utf-8?q?Philippe_Mathieu-Dau?= =?utf-8?b?ZMOp?= Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" In order to be consistent with the other code base uses, rewrite slightly how the MIPS_MALTA object is created. No logical change. Signed-off-by: Philippe Mathieu-Daudé --- hw/mips/malta.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/hw/mips/malta.c b/hw/mips/malta.c index fe8f6f7ef51..6c447d159e3 100644 --- a/hw/mips/malta.c +++ b/hw/mips/malta.c @@ -1231,11 +1231,11 @@ void mips_malta_init(MachineState *machine) DriveInfo *dinfo; int fl_idx = 0; int be; + MaltaState *s; + DeviceState *dev; - DeviceState *dev = qdev_new(TYPE_MIPS_MALTA); - MaltaState *s = MIPS_MALTA(dev); - - sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); + s = MIPS_MALTA(qdev_new(TYPE_MIPS_MALTA)); + sysbus_realize_and_unref(SYS_BUS_DEVICE(s), &error_fatal); /* create CPU */ mips_create_cpu(machine, s, &cbus_irq, &i8259_irq);