From patchwork Tue May 4 05:52:42 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: David Gibson X-Patchwork-Id: 430822 Delivered-To: patch@linaro.org Received: by 2002:a02:c901:0:0:0:0:0 with SMTP id t1csp3501687jao; Mon, 3 May 2021 23:19:40 -0700 (PDT) X-Google-Smtp-Source: ABdhPJxaKIo/Bdp/Fyf5vsXWAVFPoyF2k5BlWuzFqDMx2rRfwE6BOy/dV59TFPqFhXao0EipJvlT X-Received: by 2002:ab0:3a6:: with SMTP id 35mr18766476uau.29.1620109180238; Mon, 03 May 2021 23:19:40 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1620109180; cv=none; d=google.com; s=arc-20160816; b=T8fZii3eDV7d2NZ5UEdIiTpu9KJbocdUb9e/PU7w/sgpwTpawfwlxf931BgBZApFBg zmxquJ0w9GKJCnlBD2l/YrL/TkmNpUrNaHBKud9rXUqMRMY+xZlrbcgXpUvnWsIyQHeV iEdZhtyhY0lU0RiEkS8BHErBya+gV4Ye0YZFYVuy3CIl1Vs0N1u2h9XkijXIklrlodBj nKdlWsgBbf3N1aH1fbchE5lCFEc4fscM/9ijmKBH6Uc4tVBpa2KmppfJOFLsvO7ZwBYA CPtTryliUuQAWu7r3n831wwZiZAlf2qp+YKzp94C5UH8Cz0HcCSOASOXlcVsWgsjuGCr yImQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=pZNpWidWt5EUj1W7OhnVyZqGsMHC6/xIeJNs62nx1R8=; b=eQT2h0IkyHn1ouU4sJzkb9rWPc6XUKNp7Bs/tKzQb6LGuYBorrLmJDYy5qCGUbhNQ2 C9uJ2C9cVKMUq6ajmVYC1dWO+p4xpso2atRkCtCAEj/YlGdrNG1Ah6FX7KqRycRXsHJe YNMGVV2XCjTcMxFXn4oLUNA3bEWSxreMKAsRm5U/wnpi7nI3Cxs/h7E62X5VeeoNVvtV 4ZPfALmaaFmUGsjkGl0iB5mnzVyhu0k6dGKSBQI+Sf0MPWCI1gTvVvLB7dWWnt/shbJX P5GzfceVvkv8q+ifnmwAgDKxaX+1XXXXdHY0YsrqNASeHg5kvm/eDpX51s2erx5NEjwF yDBA== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@gibson.dropbear.id.au header.s=201602 header.b="azv2z9J/"; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org" Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id t4si3280948vsj.142.2021.05.03.23.19.33 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Mon, 03 May 2021 23:19:40 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=fail header.i=@gibson.dropbear.id.au header.s=201602 header.b="azv2z9J/"; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org" Received: from localhost ([::1]:35086 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1ldoP6-0000SK-GO for patch@linaro.org; Tue, 04 May 2021 02:19:32 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:60528) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1ldo04-0005IM-FK; Tue, 04 May 2021 01:53:42 -0400 Received: from bilbo.ozlabs.org ([2401:3900:2:1::2]:51127 helo=ozlabs.org) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1ldo00-0004kV-Pa; Tue, 04 May 2021 01:53:39 -0400 Received: by ozlabs.org (Postfix, from userid 1007) id 4FZ8CK4xscz9sXH; Tue, 4 May 2021 15:53:17 +1000 (AEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=gibson.dropbear.id.au; s=201602; t=1620107597; bh=Xk1wYOuZSpZWxh2ux/tBAmxZ1jpImU1ImlZmhp9mW8o=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=azv2z9J/mErL83AOAoT9QXVFaLY4N1WtUEUecMWWwpubJbocbTTUdU+3M5FDyHf97 CzJDjWPDrPrJQlvptPRrFjXujgYi9ujgJyh1y9iM0yDmyVatnNOPqSjetDOBZ6/U2a 4CKRHOVczwG/GLggkGyJfrlOIqX6OrG2nJ4rjyKY= From: David Gibson To: peter.maydell@linaro.org, groug@kaod.org Subject: [PULL 16/46] target/ppc: Remove MSR_SA and MSR_AP from hflags Date: Tue, 4 May 2021 15:52:42 +1000 Message-Id: <20210504055312.306823-17-david@gibson.dropbear.id.au> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20210504055312.306823-1-david@gibson.dropbear.id.au> References: <20210504055312.306823-1-david@gibson.dropbear.id.au> MIME-Version: 1.0 Received-SPF: pass client-ip=2401:3900:2:1::2; envelope-from=dgibson@ozlabs.org; helo=ozlabs.org X-Spam_score_int: -17 X-Spam_score: -1.8 X-Spam_bar: - X-Spam_report: (-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, HEADER_FROM_DIFFERENT_DOMAINS=0.25, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Richard Henderson , qemu-ppc@nongnu.org, qemu-devel@nongnu.org, David Gibson Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" From: Richard Henderson Nothing within the translator -- or anywhere else for that matter -- checks MSR_SA or MSR_AP on the 602. This may be a mistake. However, for the moment, we need not record these bits in hflags. This allows us to simplify HFLAGS_VSX computation by moving it to overlap with MSR_VSX. Reviewed-by: David Gibson Signed-off-by: Richard Henderson Message-Id: <20210323184340.619757-8-richard.henderson@linaro.org> Signed-off-by: David Gibson --- target/ppc/cpu.h | 4 +--- target/ppc/helper_regs.c | 10 ++++------ 2 files changed, 5 insertions(+), 9 deletions(-) -- 2.31.1 diff --git a/target/ppc/cpu.h b/target/ppc/cpu.h index 3c28ddb331..2f72f83ee3 100644 --- a/target/ppc/cpu.h +++ b/target/ppc/cpu.h @@ -600,14 +600,12 @@ enum { HFLAGS_DR = 4, /* MSR_DR */ HFLAGS_IR = 5, /* MSR_IR */ HFLAGS_SPE = 6, /* from MSR_SPE if cpu has SPE; avoid overlap w/ MSR_VR */ - HFLAGS_VSX = 7, /* from MSR_VSX if cpu has VSX; avoid overlap w/ MSR_AP */ HFLAGS_TM = 8, /* computed from MSR_TM */ HFLAGS_BE = 9, /* MSR_BE -- from elsewhere on embedded ppc */ HFLAGS_SE = 10, /* MSR_SE -- from elsewhere on embedded ppc */ HFLAGS_FP = 13, /* MSR_FP */ HFLAGS_PR = 14, /* MSR_PR */ - HFLAGS_SA = 22, /* MSR_SA */ - HFLAGS_AP = 23, /* MSR_AP */ + HFLAGS_VSX = 23, /* MSR_VSX if cpu has VSX */ HFLAGS_VR = 25, /* MSR_VR if cpu has VRE */ }; diff --git a/target/ppc/helper_regs.c b/target/ppc/helper_regs.c index f85bb14d1d..dd3cd770a3 100644 --- a/target/ppc/helper_regs.c +++ b/target/ppc/helper_regs.c @@ -99,11 +99,8 @@ void hreg_compute_hflags(CPUPPCState *env) QEMU_BUILD_BUG_ON(MSR_DR != HFLAGS_DR); QEMU_BUILD_BUG_ON(MSR_IR != HFLAGS_IR); QEMU_BUILD_BUG_ON(MSR_FP != HFLAGS_FP); - QEMU_BUILD_BUG_ON(MSR_SA != HFLAGS_SA); - QEMU_BUILD_BUG_ON(MSR_AP != HFLAGS_AP); msr_mask = ((1 << MSR_LE) | (1 << MSR_PR) | - (1 << MSR_DR) | (1 << MSR_IR) | - (1 << MSR_FP) | (1 << MSR_SA) | (1 << MSR_AP)); + (1 << MSR_DR) | (1 << MSR_IR) | (1 << MSR_FP)); if (ppc_flags & POWERPC_FLAG_HID0_LE) { /* @@ -143,8 +140,9 @@ void hreg_compute_hflags(CPUPPCState *env) QEMU_BUILD_BUG_ON(MSR_VR != HFLAGS_VR); msr_mask |= 1 << MSR_VR; } - if ((ppc_flags & POWERPC_FLAG_VSX) && (msr & (1 << MSR_VSX))) { - hflags |= 1 << HFLAGS_VSX; + if (ppc_flags & POWERPC_FLAG_VSX) { + QEMU_BUILD_BUG_ON(MSR_VSX != HFLAGS_VSX); + msr_mask |= 1 << MSR_VSX; } if ((ppc_flags & POWERPC_FLAG_TM) && (msr & (1ull << MSR_TM))) { hflags |= 1 << HFLAGS_TM;