From patchwork Thu Jun 2 11:58:26 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Laurent Vivier X-Patchwork-Id: 578099 Delivered-To: patch@linaro.org Received: by 2002:a05:7000:5806:0:0:0:0 with SMTP id j6csp478954max; Thu, 2 Jun 2022 05:11:27 -0700 (PDT) X-Google-Smtp-Source: ABdhPJzgK/4qXoqvJf9WCpaQUc5cXgaDb/VNwutqw6TfQ3RQWAf9Vkx0UBYRbTfmaQUNWqEP1z6n X-Received: by 2002:ac8:7f82:0:b0:304:cbe0:caa6 with SMTP id z2-20020ac87f82000000b00304cbe0caa6mr3248367qtj.143.1654171887631; Thu, 02 Jun 2022 05:11:27 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1654171887; cv=none; d=google.com; s=arc-20160816; b=u5JU9hPKEuN1uqxiSXmL6VewZs7zUpT0N9cYPMUV+xKg8WKV/5s/dcXlRmc7BVR5mP l70Dmhf7fAjyK1x0caE2eNICUzyRXNKumm0Bkxk0om8efGCvUpBwOXG5k7llzmosQgD0 /COmyN1p0TB/fljxO7gV0BS6I9TksE7GsOD8Ya8AKwVa63/Tz1D7vs9pJGUB5EczGsw+ n0flEDujsRdVC4pGA+8KCe22xdkLp7KSj/morqcZR/qWkdWnV7ooiGWI3zFQLlYEhEWM rAGHhEMWu0EWJoBiWi5eYGQ9f3oD2HoK7qW/LDI3FkJm1npeKPPYWFPTJ6RSJsVJjQ2I rHDg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from; bh=MgOWkm9lnwXwN/8QV4yYmwMrlRUvUHV28taLdb072Io=; b=ppVWdPAfv0MK79AxQ5D/7FnImOmFa2/HuQdFk0ujMQAxPO7rr31o+zCr8mHuAPO1cn IJCRMYJwyrCmfam6CKOZfRO9aeFYyAmjFWrOqsF2WKfBQLes9ORpLk2jOTA0B6Ug5VKV V24onFHvfsnhTmIRGZgKf6blXzqeJiN4qHvCrl1MxsUmiA8iTSAemddHwb0D2abwbzjf GUeSClgabbXhrauv+ePMLQkx+/JFlyMqcqz0+N/+zKTYESj33huiCp4s9r2Smwfbt8MR wLrldY/ssE28CRk9DSX9WN4/pn3VrPDQ4vLXIRdiS0o4oSmE4EJrFM6o9GUeK4JdWSA0 tDvg== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org" Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id iy11-20020a0562140f6b00b004644b74cd94si1764886qvb.477.2022.06.02.05.11.27 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Thu, 02 Jun 2022 05:11:27 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org" Received: from localhost ([::1]:41932 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1nwjfj-0001Dp-5T for patch@linaro.org; Thu, 02 Jun 2022 08:11:27 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:46900) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1nwjTT-0000Xl-2Z for qemu-devel@nongnu.org; Thu, 02 Jun 2022 07:58:47 -0400 Received: from mout.kundenserver.de ([217.72.192.73]:37981) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1nwjTR-0001Df-5Y for qemu-devel@nongnu.org; Thu, 02 Jun 2022 07:58:46 -0400 Received: from quad ([82.142.8.70]) by mrelayeu.kundenserver.de (mreue108 [212.227.15.183]) with ESMTPSA (Nemesis) id 1MeD1l-1nPJnZ3nip-00bK23; Thu, 02 Jun 2022 13:58:43 +0200 From: Laurent Vivier To: qemu-devel@nongnu.org Cc: Laurent Vivier , Richard Henderson Subject: [PULL 08/19] target/m68k: Fix address argument for EXCP_CHK Date: Thu, 2 Jun 2022 13:58:26 +0200 Message-Id: <20220602115837.2013918-9-laurent@vivier.eu> X-Mailer: git-send-email 2.36.1 In-Reply-To: <20220602115837.2013918-1-laurent@vivier.eu> References: <20220602115837.2013918-1-laurent@vivier.eu> MIME-Version: 1.0 X-Provags-ID: V03:K1:WnZLBWQ7LjeNtl2oz0PAPlylRE93UJuVhVrCe/LcWs5UC3SopHt jeZH6ADRHay4qmMoXcSHlvhLwGmp+pb9Jhyhslv01ciWT4ZDFKaY5aTeIf13q8tQGUs6Obf OZQS30bhcMiLBlXjc7eJoVyAOcovR1Xc3SWUHe1gN61y9pvjpR6kB6bFZsC2ZqNWIJeudIl Tq9sYnlNW8JYNeuZEXt/A== X-UI-Out-Filterresults: notjunk:1;V03:K0:BUwLszaAd1Y=:r4zbB+hGInrflnqv7MC727 rGQpmOLaiAvQGvULoAd/zlTgT6yots3+Bx2ApOHtz9dk4Fx/y8J89UQliMgNmCaGK4Ors0lUg m43tfzS0mYsGsqN6hwqt1r+NiCo59/VsNLHwq5d8s1eDgszLM3vLrqVYyV490d0frTmeo99YB hVkVD5DQqKeMZRUXKBV7kbOQ32rzux2UMRdN5Of3lF8eM8Wk+FNaykwSGDQzQTlOd1NbLZdyV QvydcL8VCVGkKWEHciZ55REUrOKKh2oReoIzUYC/buGmaeaxtiBRNX8N5rLAWI+9k2RC9/bn3 f9aJkN6voGRG2NMNfh0ehhvhedY2KdSbMv3u8RKBiXGIvKiyaQANi5yvRWDNEee78YCT38200 ekJo0WCZ4OyhZ1/cISOgCG/M3Ga1xfeubyeIHn7Kf2iAqRGJC+HNDHmRUvc4GPdvxO7FH76rS cNjXfS2fRHdacLByf2ITiABM1Ddm/mgjekDczXW5HFP1KNFFeikToqiwrn+s7wOUSZtlvR2fT yfUj4bsDreF1tGnFom3unDRPa9CcaXbYuVbkE1liET2X6Kn0paJepSlm025Yl1CnRx7CGUG9j 0TPeDTQkCtbeg+qq2ByoBZXihm0zYAyw1bdSfE69ou7B5YNHI40PR3VlPuIcgzAl/GucvsivW Q0tzAs49zNMIVnyMyT6r5ZFvFJu0ZKb+sJxRk8Mh1zDQqd5UXVu9olognwtppTn5U2Wi/sMJW pCfp0wKXBLzPTKJOYuKhR1IhDnInhvyN5PyvlQ== Received-SPF: none client-ip=217.72.192.73; envelope-from=laurent@vivier.eu; helo=mout.kundenserver.de X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H2=-0.001, SPF_HELO_NONE=0.001, SPF_NONE=0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" From: Richard Henderson According to the M68040 Users Manual, section 8.4.3, Six word stack frame (format 2), CHK, CHK2 (and others) are supposed to record the next insn in PC and the address of the trapping instruction in ADDRESS. Create a raise_exception_format2 function to centralize recording of the trapping pc in mmu.ar, plus advancing to the next insn. Update m68k_interrupt_all to pass mmu.ar to do_stack_frame. Update cpu_loop to pass mmu.ar to siginfo.si_addr, as the kernel does in trap_c(). Reviewed-by: Laurent Vivier Signed-off-by: Richard Henderson Message-Id: <20220602013401.303699-7-richard.henderson@linaro.org> Signed-off-by: Laurent Vivier --- target/m68k/cpu.h | 6 +++++ linux-user/m68k/cpu_loop.c | 2 +- target/m68k/op_helper.c | 54 ++++++++++++++++++++------------------ 3 files changed, 36 insertions(+), 26 deletions(-) diff --git a/target/m68k/cpu.h b/target/m68k/cpu.h index 9b3bf7a44819..558c3c67d607 100644 --- a/target/m68k/cpu.h +++ b/target/m68k/cpu.h @@ -122,6 +122,12 @@ typedef struct CPUArchState { /* MMU status. */ struct { + /* + * Holds the "address" value in between raising an exception + * and creation of the exception stack frame. + * Used for both Format 7 exceptions (Access, i.e. mmu) + * and Format 2 exceptions (chk, div0, trapcc, etc). + */ uint32_t ar; uint32_t ssw; /* 68040 */ diff --git a/linux-user/m68k/cpu_loop.c b/linux-user/m68k/cpu_loop.c index 12e5d9cd5363..e24d17e180e3 100644 --- a/linux-user/m68k/cpu_loop.c +++ b/linux-user/m68k/cpu_loop.c @@ -47,7 +47,7 @@ void cpu_loop(CPUM68KState *env) force_sig_fault(TARGET_SIGILL, TARGET_ILL_ILLOPN, env->pc); break; case EXCP_CHK: - force_sig_fault(TARGET_SIGFPE, TARGET_FPE_INTOVF, env->pc); + force_sig_fault(TARGET_SIGFPE, TARGET_FPE_INTOVF, env->mmu.ar); break; case EXCP_DIV0: force_sig_fault(TARGET_SIGFPE, TARGET_FPE_INTDIV, env->pc); diff --git a/target/m68k/op_helper.c b/target/m68k/op_helper.c index 777869790b66..750d65576fcf 100644 --- a/target/m68k/op_helper.c +++ b/target/m68k/op_helper.c @@ -397,13 +397,16 @@ static void m68k_interrupt_all(CPUM68KState *env, int is_hw) case EXCP_ILLEGAL: case EXCP_DIV0: - case EXCP_CHK: case EXCP_TRAPCC: case EXCP_TRACE: /* FIXME: addr is not only env->pc */ do_stack_frame(env, &sp, 2, oldsr, env->pc, env->pc); break; + case EXCP_CHK: + do_stack_frame(env, &sp, 2, oldsr, env->mmu.ar, env->pc); + break; + case EXCP_SPURIOUS ... EXCP_INT_LEVEL_7: if (is_hw && (oldsr & SR_M)) { do_stack_frame(env, &sp, 0, oldsr, 0, env->pc); @@ -548,6 +551,29 @@ void HELPER(raise_exception)(CPUM68KState *env, uint32_t tt) raise_exception(env, tt); } +G_NORETURN static void +raise_exception_format2(CPUM68KState *env, int tt, int ilen, uintptr_t raddr) +{ + CPUState *cs = env_cpu(env); + + cs->exception_index = tt; + + /* Recover PC and CC_OP for the beginning of the insn. */ + cpu_restore_state(cs, raddr, true); + + /* Flags are current in env->cc_*, or are undefined. */ + env->cc_op = CC_OP_FLAGS; + + /* + * Remember original pc in mmu.ar, for the Format 2 stack frame. + * Adjust PC to end of the insn. + */ + env->mmu.ar = env->pc; + env->pc += ilen; + + cpu_loop_exit(cs); +} + void HELPER(divuw)(CPUM68KState *env, int destr, uint32_t den) { uint32_t num = env->dregs[destr]; @@ -1065,18 +1091,7 @@ void HELPER(chk)(CPUM68KState *env, int32_t val, int32_t ub) env->cc_c = 0 <= ub ? val < 0 || val > ub : val > ub && val < 0; if (val < 0 || val > ub) { - CPUState *cs = env_cpu(env); - - /* Recover PC and CC_OP for the beginning of the insn. */ - cpu_restore_state(cs, GETPC(), true); - - /* flags have been modified by gen_flush_flags() */ - env->cc_op = CC_OP_FLAGS; - /* Adjust PC to end of the insn. */ - env->pc += 2; - - cs->exception_index = EXCP_CHK; - cpu_loop_exit(cs); + raise_exception_format2(env, EXCP_CHK, 2, GETPC()); } } @@ -1097,17 +1112,6 @@ void HELPER(chk2)(CPUM68KState *env, int32_t val, int32_t lb, int32_t ub) env->cc_c = lb <= ub ? val < lb || val > ub : val > ub && val < lb; if (env->cc_c) { - CPUState *cs = env_cpu(env); - - /* Recover PC and CC_OP for the beginning of the insn. */ - cpu_restore_state(cs, GETPC(), true); - - /* flags have been modified by gen_flush_flags() */ - env->cc_op = CC_OP_FLAGS; - /* Adjust PC to end of the insn. */ - env->pc += 4; - - cs->exception_index = EXCP_CHK; - cpu_loop_exit(cs); + raise_exception_format2(env, EXCP_CHK, 4, GETPC()); } }