diff mbox series

[PULL,26/47] tcg: Move TCG_TYPE_COUNT outside enum

Message ID	20221230000221.2764875-27-richard.henderson@linaro.org
State	Accepted
Commit	89496a85b4696b797e904a65a10b0600a95a12ec
Headers	show Delivered-To: patch@linaro.org Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; From: Richard Henderson <richard.henderson@linaro.org> To: qemu-devel@nongnu.org Cc: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= <philmd@linaro.org> Subject: [PULL 26/47] tcg: Move TCG_TYPE_COUNT outside enum Date: Thu, 29 Dec 2022 16:02:00 -0800 Message-Id: <20221230000221.2764875-27-richard.henderson@linaro.org> In-Reply-To: <20221230000221.2764875-1-richard.henderson@linaro.org> References: <20221230000221.2764875-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Received-SPF: pass client-ip=2607:f8b0:4864:20::629; envelope-from=richard.henderson@linaro.org; helo=mail-pl1-x629.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action Precedence: list Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org
Series	[PULL,01/47] tcg: convert tcg/README to rst \| expand [PULL,01/47] tcg: convert tcg/README to rst [PULL,02/47] meson: Move CONFIG_TCG_INTERPRETER to config_host [PULL,03/47] tcg/s390x: Fix coding style [PULL,04/47] tcg: Cleanup trailing whitespace [PULL,05/47] qemu/main-loop: Introduce QEMU_IOTHREAD_LOCK_GUARD [PULL,06/47] hw/mips: Use QEMU_IOTHREAD_LOCK_GUARD in cpu_mips_irq_request [PULL,07/47] target/ppc: Use QEMU_IOTHREAD_LOCK_GUARD in ppc_maybe_interrupt [PULL,08/47] target/ppc: Use QEMU_IOTHREAD_LOCK_GUARD in cpu_interrupt_exittb [PULL,09/47] target/riscv: Use QEMU_IOTHREAD_LOCK_GUARD in riscv_cpu_update_mip [PULL,10/47] hw/ppc: Use QEMU_IOTHREAD_LOCK_GUARD in ppc_set_irq [PULL,11/47] accel/tcg: Use QEMU_IOTHREAD_LOCK_GUARD in io_readx/io_writex [PULL,12/47] tcg: Tidy tcg_reg_alloc_op [PULL,13/47] tcg: Remove TCG_TARGET_STACK_GROWSUP [PULL,14/47] tci: MAX_OPC_PARAM_IARGS is no longer used [PULL,15/47] tcg: Fix tcg_reg_alloc_dup* [PULL,16/47] tcg: Centralize updates to reg_to_temp [PULL,17/47] tcg: Remove check_regs [PULL,18/47] tcg: Massage process_op_defs() [PULL,19/47] tcg: Introduce paired register allocation [PULL,20/47] accel/tcg: Set cflags_next_tb in cpu_common_initfn [PULL,21/47] target/sparc: Avoid TCGV_{LOW,HIGH} [PULL,22/47] tcg: Move TCG_{LOW,HIGH} to tcg-internal.h [PULL,23/47] tcg: Add temp_subindex to TCGTemp [PULL,24/47] tcg: Simplify calls to temp_sync vs mem_coherent [PULL,25/47] tcg: Allocate TCGTemp pairs in host memory order [PULL,26/47] tcg: Move TCG_TYPE_COUNT outside enum [PULL,27/47] tcg: Introduce tcg_type_size [PULL,28/47] tcg: Introduce TCGCallReturnKind and TCGCallArgumentKind [PULL,29/47] tcg: Replace TCG_TARGET_CALL_ALIGN_ARGS with TCG_TARGET_CALL_ARG_I64 [PULL,30/47] tcg: Replace TCG_TARGET_EXTEND_ARGS with TCG_TARGET_CALL_ARG_I32 [PULL,31/47] tcg: Use TCG_CALL_ARG_EVEN for TCI special case [PULL,32/47] accel/tcg/plugin: Don't search for the function pointer index [PULL,33/47] accel/tcg/plugin: Avoid duplicate copy in copy_call [PULL,34/47] accel/tcg/plugin: Use copy_op in append_{udata,mem}_cb [PULL,35/47] tcg: Pass number of arguments to tcg_emit_op() / tcg_op_insert_*() [PULL,36/47] tcg: Vary the allocation size for TCGOp [PULL,37/47] tcg: Use output_pref wrapper function [PULL,38/47] tcg: Reorg function calls [PULL,39/47] tcg: Convert typecode_to_ffi from array to function [PULL,40/47] tcg: Factor init_ffi_layouts() out of tcg_context_init() [PULL,41/47] tcg: Move ffi_cif pointer into TCGHelperInfo [PULL,42/47] tcg/aarch64: Merge tcg_out_callr into tcg_out_call [PULL,43/47] tcg: Add TCGHelperInfo argument to tcg_out_call [PULL,44/47] accel/tcg: Fix tb_invalidate_phys_page_unwind [PULL,45/47] accel/tcg: Use g_free_rcu for user-exec interval trees [PULL,46/47] accel/tcg: Handle false negative lookup in page_check_range [PULL,47/47] tests/tcg/multiarch: add vma-pthread.c

Commit Message

Richard Henderson Dec. 30, 2022, 12:02 a.m. UTC

The count is not itself an enumerator.  Move it outside to
prevent the compiler from considering it with -Wswitch-enum.

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
 include/tcg/tcg.h | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff mbox series

Patch

diff --git a/include/tcg/tcg.h b/include/tcg/tcg.h
index afa18986b1..f2da340bb9 100644
--- a/include/tcg/tcg.h
+++ b/include/tcg/tcg.h
@@ -294,7 +294,8 @@  typedef enum TCGType {
     TCG_TYPE_V128,
     TCG_TYPE_V256,
 
-    TCG_TYPE_COUNT, /* number of different types */
+    /* Number of different types (integer not enum) */
+#define TCG_TYPE_COUNT  (TCG_TYPE_V256 + 1)
 
     /* An alias for the size of the host register.  */
 #if TCG_TARGET_REG_BITS == 32