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[209.51.188.17]) by mx.google.com with ESMTPS id q12-20020a05620a024c00b00728811980bbsi195790qkn.532.2023.03.02.11.18.50 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Thu, 02 Mar 2023 11:18:50 -0800 (PST) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b="CbQ/ZT0f"; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1pXoNs-0006fZ-8R; Thu, 02 Mar 2023 14:14:32 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1pXoNp-0006Z7-9a for qemu-devel@nongnu.org; Thu, 02 Mar 2023 14:14:29 -0500 Received: from mail-wr1-x42a.google.com ([2a00:1450:4864:20::42a]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1pXoNi-0000jl-SP for qemu-devel@nongnu.org; Thu, 02 Mar 2023 14:14:29 -0500 Received: by mail-wr1-x42a.google.com with SMTP id bw19so112023wrb.13 for ; Thu, 02 Mar 2023 11:14:22 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=UgR0BafSwr/xFk3Gul6hkEhAD3BiZ8Amj/PZ/fIFDYU=; b=CbQ/ZT0faM9y0BcdM4/6VmBVQdaipLI9UP9B1iQ79Lp2b+xsIx29VqLhFJKFZc/Ulu I+vQa5AX5fafjTFgTneZVDSJ5fI7Mv0XUwKU/WMCQFPyCVNpVIxeHYK+FpKkNdOrnQCJ uVcxVJX/6MQWS83Nyl/ojLyZt9sOXLzhLqO1lFMWVoW89twlu7QaKfjMcr1m7GS5Quui +P2G7VxnpzNAM0J/Xd68joRFn24GaOhNZF6J94Pdy5qXeD0NRhMRPjwVhCX/jdFsdqbv 4VzjrZbgbd4Yk4Pu4pHHXIO9RIodrQHrRtJqsW1d0xGWt29KcgMUw1Eib5ZXMF2Ot+P6 oOrQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=UgR0BafSwr/xFk3Gul6hkEhAD3BiZ8Amj/PZ/fIFDYU=; b=ZxIO4JDcuQOfNe63DC71MwiLTirla73t2gM+KzqxrrFSsNUAdOaQs6Q1X4XCIJMU6L 4YwJk7BL50cCi5TvmtGzuVZD8ShasNMDmz48ikHmom0JN8pVKdUqn+SvcljbFjWcJwBQ uVVkbcuh/MtPEiir8DnztoYgjjG+5l8+QskPzDMS25S9+xJ2lZoGF+K2H67eOXMuEddi e+KxEOdYyJofR4zV6iculfU5Hj5gL6ATBYTn0BelRCNrzE2ECtyOGpWprcsfPgrLaAID 6q45jJHH2x3gFQqc34BGCpSNOlD71mIQjtT9/GC36+fRUAXleTkLi61ww80D1NB2/yWi ftzQ== X-Gm-Message-State: AO0yUKW7aXIXhIGmiDKgo3KNFRTx0d8EHcdLSazNMJ7NuFCXekaAWgn3 hQ2Asidu7H1G99xrcIEUOtustg== X-Received: by 2002:adf:e84b:0:b0:2c7:995f:3030 with SMTP id d11-20020adfe84b000000b002c7995f3030mr7906944wrn.60.1677784460723; Thu, 02 Mar 2023 11:14:20 -0800 (PST) Received: from zen.linaroharston ([85.9.250.243]) by smtp.gmail.com with ESMTPSA id o1-20020a5d4081000000b002c71a32394dsm143542wrp.64.2023.03.02.11.14.20 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 02 Mar 2023 11:14:20 -0800 (PST) Received: from zen.lan (localhost [127.0.0.1]) by zen.linaroharston (Postfix) with ESMTP id 5CD101FFC9; Thu, 2 Mar 2023 19:08:50 +0000 (GMT) From: =?utf-8?q?Alex_Benn=C3=A9e?= To: qemu-devel@nongnu.org Cc: Weiwei Li , =?utf-8?q?C=C3=A9dric_Le_Goater?= , Palmer Dabbelt , Laurent Vivier , nicolas.eder@lauterbach.com, Ilya Leoshkevich , kvm@vger.kernel.org, "Edgar E. Iglesias" , David Gibson , Max Filippov , Sunil Muthuswamy , qemu-s390x@nongnu.org, Stafford Horne , Bin Meng , Marek Vasut , Greg Kurz , Song Gao , Aleksandar Rikalo , Liu Zhiwei , Alistair Francis , Chris Wulff , qemu-riscv@nongnu.org, Michael Rolnik , qemu-arm@nongnu.org, Cleber Rosa , Artyom Tarasenko , Marcel Apfelbaum , Eduardo Habkost , Yoshinori Sato , Alexandre Iooss , Daniel Henrique Barboza , Jiaxun Yang , =?utf-8?q?Philippe_Mathieu-Daud?= =?utf-8?q?=C3=A9?= , mads@ynddal.dk, Mark Cave-Ayland , qemu-ppc@nongnu.org, Richard Henderson , John Snow , Xiaojuan Yang , Thomas Huth , Paolo Bonzini , Mahmoud Mandour , Aurelien Jarno , Bastian Koppelmann , Yanan Wang , David Hildenbrand , Taylor Simpson , Peter Maydell , =?utf-8?q?Alex_Benn=C3=A9e?= Subject: [PATCH v4 24/26] include: split target_long definition from cpu-defs Date: Thu, 2 Mar 2023 19:08:44 +0000 Message-Id: <20230302190846.2593720-25-alex.bennee@linaro.org> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230302190846.2593720-1-alex.bennee@linaro.org> References: <20230302190846.2593720-1-alex.bennee@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::42a; envelope-from=alex.bennee@linaro.org; helo=mail-wr1-x42a.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org While we will continue to include this via cpu-defs it is useful to be able to define this separately for 32 and 64 bit versions of an otherwise target independent compilation unit. Reviewed-by: Richard Henderson Signed-off-by: Alex Bennée --- v4 - update MAINTAINERS --- MAINTAINERS | 1 + include/exec/cpu-defs.h | 19 +---------------- include/exec/target_long.h | 42 ++++++++++++++++++++++++++++++++++++++ 3 files changed, 44 insertions(+), 18 deletions(-) create mode 100644 include/exec/target_long.h diff --git a/MAINTAINERS b/MAINTAINERS index 8d0113b8f9..3ef68cd0cf 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -137,6 +137,7 @@ F: docs/devel/tcg* F: include/exec/cpu*.h F: include/exec/exec-all.h F: include/exec/tb-flush.h +F: include/exec/target_long.h F: include/exec/helper*.h F: include/sysemu/cpus.h F: include/sysemu/tcg.h diff --git a/include/exec/cpu-defs.h b/include/exec/cpu-defs.h index be920d4208..cd8aa177cc 100644 --- a/include/exec/cpu-defs.h +++ b/include/exec/cpu-defs.h @@ -55,24 +55,7 @@ # endif #endif -#define TARGET_LONG_SIZE (TARGET_LONG_BITS / 8) - -/* target_ulong is the type of a virtual address */ -#if TARGET_LONG_SIZE == 4 -typedef int32_t target_long; -typedef uint32_t target_ulong; -#define TARGET_FMT_lx "%08x" -#define TARGET_FMT_ld "%d" -#define TARGET_FMT_lu "%u" -#elif TARGET_LONG_SIZE == 8 -typedef int64_t target_long; -typedef uint64_t target_ulong; -#define TARGET_FMT_lx "%016" PRIx64 -#define TARGET_FMT_ld "%" PRId64 -#define TARGET_FMT_lu "%" PRIu64 -#else -#error TARGET_LONG_SIZE undefined -#endif +#include "exec/target_long.h" #if !defined(CONFIG_USER_ONLY) && defined(CONFIG_TCG) diff --git a/include/exec/target_long.h b/include/exec/target_long.h new file mode 100644 index 0000000000..93c9472971 --- /dev/null +++ b/include/exec/target_long.h @@ -0,0 +1,42 @@ +/* + * Target Long Definitions + * + * Copyright (c) 2003 Fabrice Bellard + * Copyright (c) 2023 Linaro Ltd + * + * SPDX-License-Identifier: GPL-2.0-or-later + */ + +#ifndef _TARGET_LONG_H_ +#define _TARGET_LONG_H_ + +/* + * Usually this should only be included via cpu-defs.h however for + * certain cases where we want to build only two versions of a binary + * object we can include directly. However the build-system must + * ensure TARGET_LONG_BITS is defined directly. + */ +#ifndef TARGET_LONG_BITS +#error TARGET_LONG_BITS not defined +#endif + +#define TARGET_LONG_SIZE (TARGET_LONG_BITS / 8) + +/* target_ulong is the type of a virtual address */ +#if TARGET_LONG_SIZE == 4 +typedef int32_t target_long; +typedef uint32_t target_ulong; +#define TARGET_FMT_lx "%08x" +#define TARGET_FMT_ld "%d" +#define TARGET_FMT_lu "%u" +#elif TARGET_LONG_SIZE == 8 +typedef int64_t target_long; +typedef uint64_t target_ulong; +#define TARGET_FMT_lx "%016" PRIx64 +#define TARGET_FMT_ld "%" PRId64 +#define TARGET_FMT_lu "%" PRIu64 +#else +#error TARGET_LONG_SIZE undefined +#endif + +#endif /* _TARGET_LONG_H_ */