@@ -121,15 +121,8 @@ static NPCM7xxState *npcm7xx_create_soc(MachineState *machine,
uint32_t hw_straps)
{
NPCM7xxMachineClass *nmc = NPCM7XX_MACHINE_GET_CLASS(machine);
- MachineClass *mc = MACHINE_CLASS(nmc);
Object *obj;
- if (strcmp(machine->cpu_type, mc->default_cpu_type) != 0) {
- error_report("This board can only be used with %s",
- mc->default_cpu_type);
- exit(1);
- }
-
obj = object_new_with_props(nmc->soc_type, OBJECT(machine), "soc",
&error_abort, NULL);
object_property_set_uint(obj, "power-on-straps", hw_straps, &error_abort);
@@ -462,13 +455,17 @@ static void npcm7xx_set_soc_type(NPCM7xxMachineClass *nmc, const char *type)
static void npcm7xx_machine_class_init(ObjectClass *oc, void *data)
{
+ static const char *machine_valid_cpu_types[] = {
+ ARM_CPU_TYPE_NAME("cortex-a9"),
+ NULL
+ };
MachineClass *mc = MACHINE_CLASS(oc);
mc->no_floppy = 1;
mc->no_cdrom = 1;
mc->no_parallel = 1;
mc->default_ram_id = "ram";
- mc->default_cpu_type = ARM_CPU_TYPE_NAME("cortex-a9");
+ mc->valid_cpu_types = machine_valid_cpu_types;
}
/*
The npcm7xx Soc is created with a Cortex-A9 core, see in hw/arm/npcm7xx.c: static void npcm7xx_init(Object *obj) { NPCM7xxState *s = NPCM7XX(obj); for (int i = 0; i < NPCM7XX_MAX_NUM_CPUS; i++) { object_initialize_child(obj, "cpu[*]", &s->cpu[i], ARM_CPU_TYPE_NAME("cortex-a9")); } The MachineClass::default_cpu_type field is ignored: delete it. Use the common code introduced in commit c9cf636d48 ("machine: Add a valid_cpu_types property") to check for valid CPU type at the board level. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> --- hw/arm/npcm7xx_boards.c | 13 +++++-------- 1 file changed, 5 insertions(+), 8 deletions(-)