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[209.51.188.17]) by mx.google.com with ESMTPS id hc26-20020a05622a2a1a00b004367f8cea78si23465915qtb.587.2024.04.28.14.50.29 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Sun, 28 Apr 2024 14:50:30 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=EaiZpbdV; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1s1CPM-00032F-IH; Sun, 28 Apr 2024 17:50:04 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1s1CPL-00031y-F4 for qemu-devel@nongnu.org; Sun, 28 Apr 2024 17:50:03 -0400 Received: from mail-ed1-x52a.google.com ([2a00:1450:4864:20::52a]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1s1CP7-00015Z-1O for qemu-devel@nongnu.org; Sun, 28 Apr 2024 17:50:03 -0400 Received: by mail-ed1-x52a.google.com with SMTP id 4fb4d7f45d1cf-56c5d05128dso3493084a12.0 for ; Sun, 28 Apr 2024 14:49:43 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1714340982; x=1714945782; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=u2gMJsks/FVGo186jApsF1W5B3KJkzW5GgYA94nXNvw=; b=EaiZpbdVz+MlM8jUP5QUju2iA/21DQUmvj0vKfOYoa6QOyqx5PxxczAx6kuSn1nEmr NiDogCJcJG5ctcllwoAjc8YIj85+CVQ8IULSiJG79jx6AP7tkG7PnyBtrBQQVF7ygr8c Tu2lxFazHIxzTlibd19T1fRv8tLmI/22MzTeB4sd3SEDyEGtHYLDOQ9/4+qTkWf4OX+w TuFhNr02FQrYpLg1U0oXVJT3Jm90uNzQBAEK/RjI5vVe9GLBYIn9elgO72qnUSQJmAbj Sfh9JbBcLyKKasxNp83ds9NDUqhIDHv3c1qPVKfgSL4UAhdwNylJrUrnCPNlcZ52LAW9 3UoA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1714340982; x=1714945782; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=u2gMJsks/FVGo186jApsF1W5B3KJkzW5GgYA94nXNvw=; b=ueIwS5NfqTRQns5FTZzg4xGhOeg/J2hZKqS9EbIiC87fidGfoDaPiEd6kgkvZRe3bU 7LY/wvlOF7qjOhqGAzKehakr1HWyz9fbpkixyZDixvEH3YIwzXea/KXjCm+oAy7eiCf2 JoPFkibbp0wZPC/M2XoXvdjt8U6XQ2UvIUHCOGMhBDHCzlk2BnaX+FCg1LEhxJur3K0K Sui2IkDaU2DZzDrePOaieitW0t+8Wqi/vJZ1DKc1AiAnqZqCpaEfC7FSHKIto8oyt5VS Ukokhv1YcuZ3efnTWOTg7ifhXJ9TycIYWq0UQ322y/nJUR9SymW6ZXsOT5/rwEAbKFHl SDlA== X-Gm-Message-State: AOJu0Yx0pL/PAavIcWtVm4JsabL69Gj1GGdbVnbg1a295KgAw+p3CkRF wIlZZH/1jTnIoiF9hBvX9M4Lxd41uypw5UKSH9jasvtc5hM4aFwxio0D4HtBwVtKcav7ycozGaZ / X-Received: by 2002:a50:ccdb:0:b0:56d:c926:b92c with SMTP id b27-20020a50ccdb000000b0056dc926b92cmr5519675edj.38.1714340981894; Sun, 28 Apr 2024 14:49:41 -0700 (PDT) Received: from m1x-phil.lan ([176.176.142.130]) by smtp.gmail.com with ESMTPSA id u7-20020a50eac7000000b005727eadcb79sm681556edp.46.2024.04.28.14.49.40 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Sun, 28 Apr 2024 14:49:41 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Richard Henderson , =?utf-8?q?Philippe_Mat?= =?utf-8?q?hieu-Daud=C3=A9?= Subject: [PATCH v2 04/12] exec/cpu: Indent TARGET_PAGE_foo definitions Date: Sun, 28 Apr 2024 23:49:07 +0200 Message-ID: <20240428214915.10339-5-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20240428214915.10339-1-philmd@linaro.org> References: <20240428214915.10339-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::52a; envelope-from=philmd@linaro.org; helo=mail-ed1-x52a.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org The TARGET_PAGE_foo definitions are defined with multiple level of #ifdef'ry. Indent it a bit for clarity. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson Message-Id: <20240427155714.53669-6-philmd@linaro.org> --- include/exec/cpu-all.h | 25 +++++++++++++------------ 1 file changed, 13 insertions(+), 12 deletions(-) diff --git a/include/exec/cpu-all.h b/include/exec/cpu-all.h index e75ec13cd0..eaa59a5cc1 100644 --- a/include/exec/cpu-all.h +++ b/include/exec/cpu-all.h @@ -139,19 +139,20 @@ static inline void stl_phys_notdirty(AddressSpace *as, hwaddr addr, uint32_t val #ifdef TARGET_PAGE_BITS_VARY # include "exec/page-vary.h" extern const TargetPageBits target_page; -#ifdef CONFIG_DEBUG_TCG -#define TARGET_PAGE_BITS ({ assert(target_page.decided); target_page.bits; }) -#define TARGET_PAGE_MASK ({ assert(target_page.decided); \ - (target_long)target_page.mask; }) +# ifdef CONFIG_DEBUG_TCG +# define TARGET_PAGE_BITS ({ assert(target_page.decided); \ + target_page.bits; }) +# define TARGET_PAGE_MASK ({ assert(target_page.decided); \ + (target_long)target_page.mask; }) +# else +# define TARGET_PAGE_BITS target_page.bits +# define TARGET_PAGE_MASK ((target_long)target_page.mask) +# endif +# define TARGET_PAGE_SIZE (-(int)TARGET_PAGE_MASK) #else -#define TARGET_PAGE_BITS target_page.bits -#define TARGET_PAGE_MASK ((target_long)target_page.mask) -#endif -#define TARGET_PAGE_SIZE (-(int)TARGET_PAGE_MASK) -#else -#define TARGET_PAGE_BITS_MIN TARGET_PAGE_BITS -#define TARGET_PAGE_SIZE (1 << TARGET_PAGE_BITS) -#define TARGET_PAGE_MASK ((target_long)-1 << TARGET_PAGE_BITS) +# define TARGET_PAGE_BITS_MIN TARGET_PAGE_BITS +# define TARGET_PAGE_SIZE (1 << TARGET_PAGE_BITS) +# define TARGET_PAGE_MASK ((target_long)-1 << TARGET_PAGE_BITS) #endif #define TARGET_PAGE_ALIGN(addr) ROUND_UP((addr), TARGET_PAGE_SIZE)