From patchwork Thu Nov 7 01:22:17 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 841380 Delivered-To: patch@linaro.org Received: by 2002:a5d:6307:0:b0:381:e71e:8f7b with SMTP id i7csp833988wru; Wed, 6 Nov 2024 17:25:26 -0800 (PST) X-Forwarded-Encrypted: i=2; AJvYcCV4S7aozb0/zH6g3mSFVJ7gsJ6l0XrMxAs/CmQyKhKy41BZhKF3vLZIuNOrTNRy8lSdLWnurA==@linaro.org X-Google-Smtp-Source: AGHT+IFQhLsYT7sqhwSHwv+NwVqzQNmvBg7Wi6jVY7FjMm8n/UJtdeeXKhFZ8GAeYoEA07ylOtWK X-Received: by 2002:a05:6358:c97:b0:1c2:f482:5c0b with SMTP id e5c5f4694b2df-1c63897829amr30588255d.24.1730942726137; Wed, 06 Nov 2024 17:25:26 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1730942726; cv=none; d=google.com; s=arc-20240605; b=jJhMyFURrsr683Ee8k2AjkC19L2Htzs+MY2FU/dPCBd+gGcEEFfy4YjvSUwzxCmDGZ 8NERa5w3R+92ByjLThzVi9fRryMDMuyXuKBjuS3OoEytYFmUsJuYUYmdXCWwcwyVPb3o ccxOeXmhCNGN7NurPqb8/dIhWeMwkCvp77Vd5tFsqofkhIlR5NP8ctMqei/ov3lYmnwE sOLiMGwamZimF/MzPH7VKw+e7v9KfhLDhLpiLD05s/ipp2i5h8NbtsqItN64ApTwrRC7 alupwnT/2Rc4XNeMyyvzSBNjDuV4wakMhNwffsiGZ1ogh837gxTvl7HqLE4GLtUGmCbQ Cgww== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20240605; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=8j17IHTXkaut+m8u9uRJkB2+OtmZ4RyCwvHXesQ1YIM=; fh=Swg0SGOIJbU//IohmK643K+Mrw1XdAINGWlNttQxC/o=; b=LxN+5yUaUXmVu46jIlSEyoaNWZWbC39kJaF6VZVdvAwPTo7azSENpJqZY+H6I8qct1 qQrovsNDFICnjcLFuLDwT7GHBhUCY2ehwAkSSHGEAg4fD/LCDu4scs/baNNubGUTYYrM ixw9wX1lpuEVQmdQFD0Ay4yVNZ1uaSnc8nWMUK3u57DSMAIBZd/Enx/zqlRxooxkOX9b 2WNIc8h7vppS/dwStgCScrt4/DoHQxFxVjPrGQTToGn2Kdvdzfj6m2BsIf18T8w0vbfK V9c/Cq9MNNCxpQj98i4dQLiEneB120SjsqHiU7L78tVymZFSV0e1vLFGP8xFAZNxZh5n ml0A==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=NyVwEbpn; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org; dara=neutral header.i=@linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id 6a1803df08f44-6d396229a4csi3653746d6.143.2024.11.06.17.25.25 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Wed, 06 Nov 2024 17:25:26 -0800 (PST) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=NyVwEbpn; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org; dara=neutral header.i=@linaro.org Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1t8rFY-00065X-Ob; Wed, 06 Nov 2024 20:23:52 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1t8rFM-0005sq-KI for qemu-devel@nongnu.org; Wed, 06 Nov 2024 20:23:41 -0500 Received: from mail-wm1-x32c.google.com ([2a00:1450:4864:20::32c]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1t8rFK-0003Bq-HB for qemu-devel@nongnu.org; Wed, 06 Nov 2024 20:23:40 -0500 Received: by mail-wm1-x32c.google.com with SMTP id 5b1f17b1804b1-4316f3d3c21so3414965e9.3 for ; Wed, 06 Nov 2024 17:23:37 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1730942616; x=1731547416; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=8j17IHTXkaut+m8u9uRJkB2+OtmZ4RyCwvHXesQ1YIM=; b=NyVwEbpn7kIPLEbKxzhMxW2iQC7xY1jvZcbO1qwhkAanKExiYPPLvI7AALDOYvErkT o5S+JG2B2+CFPrJ49+ttvbZgbLRSKRaJql0tzFHK7BRvQiJizUkYtD1kn2rzbSkuXorR 2sJzhIvJ19vPtUbOfOud5aDYZPwj7gy3h8aqCohCqDkdjW/VUfocWqgURhrRqqEeMKAy pygFCHYtcmtwg6IKvfEZrceUFlcKCgFkaeiJpf87SCfF1jMCUIJhzSh7mbn8kfZ0qUnB 1/VaRlqDLkaZ0mGMi9AakU8DRmCDM6nz+N1yIpJmqfmWat01TvnNUQa/twglyQM9Sw2e 2WhA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1730942616; x=1731547416; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=8j17IHTXkaut+m8u9uRJkB2+OtmZ4RyCwvHXesQ1YIM=; b=MWXH7dGFg2odS0T7LXcILPGct6doOPvErQAdGCSBNNe9z55ynKm/TF97y48v8t9M1Z odvwk3Uw/fC9QbCEDt6MvS+BHKl3Y2lO/DldXaKVzK65QU+p4TcFLdD3OCHNSMgmmQl5 Vn8nOm2JfNsI4pgnL6XLCrxrqV4sR7j4dTbkGqspYNPSbwEATb52efRoHgzyNHJFn/uP BfAvG9wCYar8rDAt1MJzJtU5NsDjU3qvlq16LIi6MPNT/LHuy/Z1XED9H0kv87mlF11x uYe5unjWogwuMP2G0Nn3kXhEuN84TY09LfGNArI4y2W702owEBVxnXyAri7OrsU1mYG6 j3FA== X-Forwarded-Encrypted: i=1; AJvYcCVntXVOn50ALfPo7ly5Lo5D+epq+ciAVIpZMx4j41foSNdU+oxMHm6ZoFdo3o2cL9ZxoAKbJpiVRPgV@nongnu.org X-Gm-Message-State: AOJu0Ywfai7/cGgUGLnmDG7KQRuLW6p/TA6TQbWzV5uBYvMbjYJhI8+k YoDsJ9TMU3miirbC2Vvxnf2TC43cpFUORRtkFh8D48InOrVbVHKoOsBjOzONd2M= X-Received: by 2002:a05:600c:4fce:b0:431:5f1c:8352 with SMTP id 5b1f17b1804b1-432b14ba42dmr1323965e9.5.1730942615673; Wed, 06 Nov 2024 17:23:35 -0800 (PST) Received: from localhost.localdomain ([89.101.134.25]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-432b04753d5sm5634065e9.0.2024.11.06.17.23.33 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Wed, 06 Nov 2024 17:23:34 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: Anton Johansson , qemu-devel@nongnu.org Cc: Paolo Bonzini , Thomas Huth , Jason Wang , devel@lists.libvirt.org, qemu-ppc@nongnu.org, Alistair Francis , =?utf-8?q?M?= =?utf-8?q?arc-Andr=C3=A9_Lureau?= , "Edgar E. Iglesias" , qemu-arm@nongnu.org, Peter Maydell , Richard Henderson , =?utf-8?q?Philippe_Mathie?= =?utf-8?q?u-Daud=C3=A9?= Subject: [PATCH v2 11/16] target/microblaze: Set MO_TE once in do_load() / do_store() Date: Thu, 7 Nov 2024 01:22:17 +0000 Message-ID: <20241107012223.94337-12-philmd@linaro.org> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20241107012223.94337-1-philmd@linaro.org> References: <20241107012223.94337-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::32c; envelope-from=philmd@linaro.org; helo=mail-wm1-x32c.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org All callers of do_load() / do_store() set MO_TE flag. Set it once in the callees. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson --- target/microblaze/translate.c | 36 +++++++++++++++++++---------------- 1 file changed, 20 insertions(+), 16 deletions(-) diff --git a/target/microblaze/translate.c b/target/microblaze/translate.c index 4c25b1e438..86f3c19618 100644 --- a/target/microblaze/translate.c +++ b/target/microblaze/translate.c @@ -712,6 +712,8 @@ static bool do_load(DisasContext *dc, int rd, TCGv addr, MemOp mop, { MemOp size = mop & MO_SIZE; + mop |= MO_TE; + /* * When doing reverse accesses we need to do two things. * @@ -779,13 +781,13 @@ static bool trans_lbui(DisasContext *dc, arg_typeb *arg) static bool trans_lhu(DisasContext *dc, arg_typea *arg) { TCGv addr = compute_ldst_addr_typea(dc, arg->ra, arg->rb); - return do_load(dc, arg->rd, addr, MO_TE | MO_UW, dc->mem_index, false); + return do_load(dc, arg->rd, addr, MO_UW, dc->mem_index, false); } static bool trans_lhur(DisasContext *dc, arg_typea *arg) { TCGv addr = compute_ldst_addr_typea(dc, arg->ra, arg->rb); - return do_load(dc, arg->rd, addr, MO_TE | MO_UW, dc->mem_index, true); + return do_load(dc, arg->rd, addr, MO_UW, dc->mem_index, true); } static bool trans_lhuea(DisasContext *dc, arg_typea *arg) @@ -797,26 +799,26 @@ static bool trans_lhuea(DisasContext *dc, arg_typea *arg) return true; #else TCGv addr = compute_ldst_addr_ea(dc, arg->ra, arg->rb); - return do_load(dc, arg->rd, addr, MO_TE | MO_UW, MMU_NOMMU_IDX, false); + return do_load(dc, arg->rd, addr, MO_UW, MMU_NOMMU_IDX, false); #endif } static bool trans_lhui(DisasContext *dc, arg_typeb *arg) { TCGv addr = compute_ldst_addr_typeb(dc, arg->ra, arg->imm); - return do_load(dc, arg->rd, addr, MO_TE | MO_UW, dc->mem_index, false); + return do_load(dc, arg->rd, addr, MO_UW, dc->mem_index, false); } static bool trans_lw(DisasContext *dc, arg_typea *arg) { TCGv addr = compute_ldst_addr_typea(dc, arg->ra, arg->rb); - return do_load(dc, arg->rd, addr, MO_TE | MO_UL, dc->mem_index, false); + return do_load(dc, arg->rd, addr, MO_UL, dc->mem_index, false); } static bool trans_lwr(DisasContext *dc, arg_typea *arg) { TCGv addr = compute_ldst_addr_typea(dc, arg->ra, arg->rb); - return do_load(dc, arg->rd, addr, MO_TE | MO_UL, dc->mem_index, true); + return do_load(dc, arg->rd, addr, MO_UL, dc->mem_index, true); } static bool trans_lwea(DisasContext *dc, arg_typea *arg) @@ -828,14 +830,14 @@ static bool trans_lwea(DisasContext *dc, arg_typea *arg) return true; #else TCGv addr = compute_ldst_addr_ea(dc, arg->ra, arg->rb); - return do_load(dc, arg->rd, addr, MO_TE | MO_UL, MMU_NOMMU_IDX, false); + return do_load(dc, arg->rd, addr, MO_UL, MMU_NOMMU_IDX, false); #endif } static bool trans_lwi(DisasContext *dc, arg_typeb *arg) { TCGv addr = compute_ldst_addr_typeb(dc, arg->ra, arg->imm); - return do_load(dc, arg->rd, addr, MO_TE | MO_UL, dc->mem_index, false); + return do_load(dc, arg->rd, addr, MO_UL, dc->mem_index, false); } static bool trans_lwx(DisasContext *dc, arg_typea *arg) @@ -862,6 +864,8 @@ static bool do_store(DisasContext *dc, int rd, TCGv addr, MemOp mop, { MemOp size = mop & MO_SIZE; + mop |= MO_TE; + /* * When doing reverse accesses we need to do two things. * @@ -929,13 +933,13 @@ static bool trans_sbi(DisasContext *dc, arg_typeb *arg) static bool trans_sh(DisasContext *dc, arg_typea *arg) { TCGv addr = compute_ldst_addr_typea(dc, arg->ra, arg->rb); - return do_store(dc, arg->rd, addr, MO_TE | MO_UW, dc->mem_index, false); + return do_store(dc, arg->rd, addr, MO_UW, dc->mem_index, false); } static bool trans_shr(DisasContext *dc, arg_typea *arg) { TCGv addr = compute_ldst_addr_typea(dc, arg->ra, arg->rb); - return do_store(dc, arg->rd, addr, MO_TE | MO_UW, dc->mem_index, true); + return do_store(dc, arg->rd, addr, MO_UW, dc->mem_index, true); } static bool trans_shea(DisasContext *dc, arg_typea *arg) @@ -947,26 +951,26 @@ static bool trans_shea(DisasContext *dc, arg_typea *arg) return true; #else TCGv addr = compute_ldst_addr_ea(dc, arg->ra, arg->rb); - return do_store(dc, arg->rd, addr, MO_TE | MO_UW, MMU_NOMMU_IDX, false); + return do_store(dc, arg->rd, addr, MO_UW, MMU_NOMMU_IDX, false); #endif } static bool trans_shi(DisasContext *dc, arg_typeb *arg) { TCGv addr = compute_ldst_addr_typeb(dc, arg->ra, arg->imm); - return do_store(dc, arg->rd, addr, MO_TE | MO_UW, dc->mem_index, false); + return do_store(dc, arg->rd, addr, MO_UW, dc->mem_index, false); } static bool trans_sw(DisasContext *dc, arg_typea *arg) { TCGv addr = compute_ldst_addr_typea(dc, arg->ra, arg->rb); - return do_store(dc, arg->rd, addr, MO_TE | MO_UL, dc->mem_index, false); + return do_store(dc, arg->rd, addr, MO_UL, dc->mem_index, false); } static bool trans_swr(DisasContext *dc, arg_typea *arg) { TCGv addr = compute_ldst_addr_typea(dc, arg->ra, arg->rb); - return do_store(dc, arg->rd, addr, MO_TE | MO_UL, dc->mem_index, true); + return do_store(dc, arg->rd, addr, MO_UL, dc->mem_index, true); } static bool trans_swea(DisasContext *dc, arg_typea *arg) @@ -978,14 +982,14 @@ static bool trans_swea(DisasContext *dc, arg_typea *arg) return true; #else TCGv addr = compute_ldst_addr_ea(dc, arg->ra, arg->rb); - return do_store(dc, arg->rd, addr, MO_TE | MO_UL, MMU_NOMMU_IDX, false); + return do_store(dc, arg->rd, addr, MO_UL, MMU_NOMMU_IDX, false); #endif } static bool trans_swi(DisasContext *dc, arg_typeb *arg) { TCGv addr = compute_ldst_addr_typeb(dc, arg->ra, arg->imm); - return do_store(dc, arg->rd, addr, MO_TE | MO_UL, dc->mem_index, false); + return do_store(dc, arg->rd, addr, MO_UL, dc->mem_index, false); } static bool trans_swx(DisasContext *dc, arg_typea *arg)