diff mbox series

[PATCH-for-10.0,1/8] hw/pci/pci_bus: Introduce PCIBusFlags::PCI_BUS_IO_ADDR0_ALLOWED

Message ID 20241125140535.4526-2-philmd@linaro.org
State New
Headers show
Series hw/boards: Remove legacy MachineClass::pci_allow_0_address flag | expand

Commit Message

Philippe Mathieu-Daudé Nov. 25, 2024, 2:05 p.m. UTC 
Some machines need PCI buses to allow access at BAR0.
Introduce the PCI_BUS_IO_ADDR0_ALLOWED flag and the
pci_bus_allows_io_addr0_access() helper, so machines
can set this flag during creation, similarly to how
they do with the PCI_BUS_EXTENDED_CONFIG_SPACE flag.

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
 include/hw/pci/pci_bus.h | 6 ++++++
 hw/pci/pci.c             | 1 +
 2 files changed, 7 insertions(+)
diff mbox series

Patch

diff --git a/include/hw/pci/pci_bus.h b/include/hw/pci/pci_bus.h
index 2261312546..5c8b0d2887 100644
--- a/include/hw/pci/pci_bus.h
+++ b/include/hw/pci/pci_bus.h
@@ -26,6 +26,7 @@  enum PCIBusFlags {
     PCI_BUS_EXTENDED_CONFIG_SPACE                           = 0x0002,
     /* This is a CXL Type BUS */
     PCI_BUS_CXL                                             = 0x0004,
+    PCI_BUS_IO_ADDR0_ALLOWED                                = 0x0008,
 };
 
 #define PCI_NO_PASID UINT32_MAX
@@ -72,4 +73,9 @@  static inline bool pci_bus_allows_extended_config_space(PCIBus *bus)
     return !!(bus->flags & PCI_BUS_EXTENDED_CONFIG_SPACE);
 }
 
+static inline bool pci_bus_allows_io_addr0_access(PCIBus *bus)
+{
+    return !!(bus->flags & PCI_BUS_IO_ADDR0_ALLOWED);
+}
+
 #endif /* QEMU_PCI_BUS_H */
diff --git a/hw/pci/pci.c b/hw/pci/pci.c
index 1416ae202c..de3f93646f 100644
--- a/hw/pci/pci.c
+++ b/hw/pci/pci.c
@@ -1475,6 +1475,7 @@  pcibus_t pci_bar_address(PCIDevice *d,
     MachineClass *mc = MACHINE_GET_CLASS(qdev_get_machine());
     bool allow_0_address = mc->pci_allow_0_address;
 
+    allow_0_address |= pci_bus_allows_io_addr0_access(pci_get_bus(d));
     if (type & PCI_BASE_ADDRESS_SPACE_IO) {
         if (!(cmd & PCI_COMMAND_IO)) {
             return PCI_BAR_UNMAPPED;