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Tsirkin" , qemu-riscv@nongnu.org, Marcel Apfelbaum , Peter Maydell , qemu-arm@nongnu.org, Paolo Bonzini , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Subject: [PATCH-for-10.0 v2 04/13] hw/pci: Introduce PCIBusFlag::PCI_BUS_BAR_AT_ADDR0_REFUSED Date: Tue, 26 Nov 2024 12:22:03 +0100 Message-ID: <20241126112212.64524-5-philmd@linaro.org> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20241126112212.64524-1-philmd@linaro.org> References: <20241126112212.64524-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::42b; envelope-from=philmd@linaro.org; helo=mail-wr1-x42b.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Some machines need PCI buses to allow access at BAR0. Introduce the PCI_BUS_BAR_AT_ADDR0_REFUSED flag and the pci_bus_refuse_bar_at_addr_0() helper. Set the flag in pci_root_bus_internal_init() where all root buses are created. Signed-off-by: Philippe Mathieu-Daudé --- include/hw/pci/pci_bus.h | 6 ++++++ hw/pci/pci.c | 5 ++++- 2 files changed, 10 insertions(+), 1 deletion(-) diff --git a/include/hw/pci/pci_bus.h b/include/hw/pci/pci_bus.h index 6ecfe2e06d5..6d7bf682e8f 100644 --- a/include/hw/pci/pci_bus.h +++ b/include/hw/pci/pci_bus.h @@ -26,6 +26,7 @@ enum PCIBusFlag { PCI_BUS_EXTENDED_CONFIG_SPACE = 0x0002, /* This is a CXL Type BUS */ PCI_BUS_CXL = 0x0004, + PCI_BUS_BAR_AT_ADDR0_REFUSED = 0x0008, }; #define PCI_NO_PASID UINT32_MAX @@ -72,4 +73,9 @@ static inline bool pci_bus_allows_extended_config_space(PCIBus *bus) return !!(bus->flags & PCI_BUS_EXTENDED_CONFIG_SPACE); } +static inline bool pci_bus_refuse_bar_at_addr_0(PCIBus *bus) +{ + return !!(bus->flags & PCI_BUS_BAR_AT_ADDR0_REFUSED); +} + #endif /* QEMU_PCI_BUS_H */ diff --git a/hw/pci/pci.c b/hw/pci/pci.c index e05f8a828bb..27b66583e54 100644 --- a/hw/pci/pci.c +++ b/hw/pci/pci.c @@ -537,6 +537,9 @@ static void pci_root_bus_internal_init(PCIBus *bus, DeviceState *parent, bus->address_space_mem = mem; bus->address_space_io = io; bus->flags |= PCI_BUS_IS_ROOT; + if (machine_refuses_bar_at_addr_0()) { + bus->flags |= PCI_BUS_BAR_AT_ADDR0_REFUSED; + } /* host bridge */ QLIST_INIT(&bus->child); @@ -1479,7 +1482,7 @@ pcibus_t pci_bar_address(PCIDevice *d, { pcibus_t new_addr, last_addr; uint16_t cmd = pci_get_word(d->config + PCI_COMMAND); - bool bar_at_addr_0_refused = machine_refuses_bar_at_addr_0(); + bool bar_at_addr_0_refused = pci_bus_refuse_bar_at_addr_0(pci_get_bus(d)); if (type & PCI_BASE_ADDRESS_SPACE_IO) { if (!(cmd & PCI_COMMAND_IO)) {