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[88.187.86.199]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-434d52cbd16sm34950775e9.41.2024.12.04.12.27.56 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Wed, 04 Dec 2024 12:27:57 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Daniel Henrique Barboza , "Michael S. Tsirkin" , Peter Maydell , Laurent Vivier , Mark Cave-Ayland , Alistair Francis , Anton Johansson , Zhao Liu , "Edgar E. Iglesias" , David Hildenbrand , qemu-s390x@nongnu.org, Max Filippov , Paolo Bonzini , Nicholas Piggin , qemu-arm@nongnu.org, Thomas Huth , qemu-riscv@nongnu.org, Alistair Francis , qemu-ppc@nongnu.org, Richard Henderson , =?utf-8?q?Philippe_Mathie?= =?utf-8?q?u-Daud=C3=A9?= Subject: [PATCH 14/20] target: Implement CPUClass::datapath_is_big_endian (little-endian) Date: Wed, 4 Dec 2024 21:25:56 +0100 Message-ID: <20241204202602.58083-15-philmd@linaro.org> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20241204202602.58083-1-philmd@linaro.org> References: <20241204202602.58083-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::32f; envelope-from=philmd@linaro.org; helo=mail-wm1-x32f.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org For all targets which have endianness architecturally predefined as little endian (built using TARGET_BIG_ENDIAN=n), their datapath_is_big_endian() handler simply returns %false. Signed-off-by: Philippe Mathieu-Daudé --- target/alpha/cpu.c | 6 ++++++ target/avr/cpu.c | 7 ++++++- target/i386/cpu.c | 6 ++++++ target/loongarch/cpu.c | 6 ++++++ target/tricore/cpu.c | 6 ++++++ 5 files changed, 30 insertions(+), 1 deletion(-) diff --git a/target/alpha/cpu.c b/target/alpha/cpu.c index 5d75c941f7a..ee844a4c455 100644 --- a/target/alpha/cpu.c +++ b/target/alpha/cpu.c @@ -27,6 +27,11 @@ #include "fpu/softfloat.h" +static bool alpha_cpu_datapath_is_big_endian(CPUState *cs) +{ + return false; +} + static void alpha_cpu_set_pc(CPUState *cs, vaddr value) { CPUAlphaState *env = cpu_env(cs); @@ -247,6 +252,7 @@ static void alpha_cpu_class_init(ObjectClass *oc, void *data) &acc->parent_realize); cc->class_by_name = alpha_cpu_class_by_name; + cc->datapath_is_big_endian = alpha_cpu_datapath_is_big_endian; cc->has_work = alpha_cpu_has_work; cc->mmu_index = alpha_cpu_mmu_index; cc->dump_state = alpha_cpu_dump_state; diff --git a/target/avr/cpu.c b/target/avr/cpu.c index 3132842d565..f32f1bee61f 100644 --- a/target/avr/cpu.c +++ b/target/avr/cpu.c @@ -159,6 +159,11 @@ static ObjectClass *avr_cpu_class_by_name(const char *cpu_model) return object_class_by_name(cpu_model); } +static bool avr_cpu_datapath_is_big_endian(CPUState *cs) +{ + return false; +} + static void avr_cpu_dump_state(CPUState *cs, FILE *f, int flags) { CPUAVRState *env = cpu_env(cs); @@ -230,7 +235,7 @@ static void avr_cpu_class_init(ObjectClass *oc, void *data) &mcc->parent_phases); cc->class_by_name = avr_cpu_class_by_name; - + cc->datapath_is_big_endian = avr_cpu_datapath_is_big_endian; cc->has_work = avr_cpu_has_work; cc->mmu_index = avr_cpu_mmu_index; cc->dump_state = avr_cpu_dump_state; diff --git a/target/i386/cpu.c b/target/i386/cpu.c index 3725dbbc4b3..f783d311579 100644 --- a/target/i386/cpu.c +++ b/target/i386/cpu.c @@ -2008,6 +2008,11 @@ static char *x86_cpu_class_get_model_name(X86CPUClass *cc) return cpu_model_from_type(class_name); } +static bool x86_cpu_datapath_is_big_endian(CPUState *cs) +{ + return false; +} + typedef struct X86CPUVersionDefinition { X86CPUVersion version; const char *alias; @@ -8588,6 +8593,7 @@ static void x86_cpu_common_class_init(ObjectClass *oc, void *data) cc->class_by_name = x86_cpu_class_by_name; cc->parse_features = x86_cpu_parse_featurestr; + cc->datapath_is_big_endian = x86_cpu_datapath_is_big_endian; cc->has_work = x86_cpu_has_work; cc->mmu_index = x86_cpu_mmu_index; cc->dump_state = x86_cpu_dump_state; diff --git a/target/loongarch/cpu.c b/target/loongarch/cpu.c index 57cc4f314bf..b9cf0091546 100644 --- a/target/loongarch/cpu.c +++ b/target/loongarch/cpu.c @@ -742,6 +742,11 @@ static ObjectClass *loongarch_cpu_class_by_name(const char *cpu_model) return oc; } +static bool loongarch_cpu_datapath_is_big_endian(CPUState *cs) +{ + return false; +} + void loongarch_cpu_dump_state(CPUState *cs, FILE *f, int flags) { CPULoongArchState *env = cpu_env(cs); @@ -836,6 +841,7 @@ static void loongarch_cpu_class_init(ObjectClass *c, void *data) &lacc->parent_phases); cc->class_by_name = loongarch_cpu_class_by_name; + cc->datapath_is_big_endian = loongarch_cpu_datapath_is_big_endian; cc->has_work = loongarch_cpu_has_work; cc->mmu_index = loongarch_cpu_mmu_index; cc->dump_state = loongarch_cpu_dump_state; diff --git a/target/tricore/cpu.c b/target/tricore/cpu.c index 1a261715907..ba53d83f662 100644 --- a/target/tricore/cpu.c +++ b/target/tricore/cpu.c @@ -29,6 +29,11 @@ static inline void set_feature(CPUTriCoreState *env, int feature) env->features |= 1ULL << feature; } +static bool tricore_cpu_datapath_is_big_endian(CPUState *cs) +{ + return false; +} + static const gchar *tricore_gdb_arch_name(CPUState *cs) { return "tricore"; @@ -191,6 +196,7 @@ static void tricore_cpu_class_init(ObjectClass *c, void *data) resettable_class_set_parent_phases(rc, NULL, tricore_cpu_reset_hold, NULL, &mcc->parent_phases); cc->class_by_name = tricore_cpu_class_by_name; + cc->datapath_is_big_endian = tricore_cpu_datapath_is_big_endian; cc->has_work = tricore_cpu_has_work; cc->mmu_index = tricore_cpu_mmu_index;