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[88.187.86.199]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-3861fd46cb2sm3118604f8f.62.2024.12.05.15.24.48 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Thu, 05 Dec 2024 15:24:48 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Max Filippov , Richard Henderson , =?utf-8?q?Philippe_Mathie?= =?utf-8?q?u-Daud=C3=A9?= Subject: [PATCH 2/2] target/xtensa: Remove tswap() calls in semihosting simcall() helper Date: Fri, 6 Dec 2024 00:24:37 +0100 Message-ID: <20241205232437.85235-3-philmd@linaro.org> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20241205232437.85235-1-philmd@linaro.org> References: <20241205232437.85235-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::32f; envelope-from=philmd@linaro.org; helo=mail-wm1-x32f.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org In preparation of heterogeneous emulation where cores with different endianness can run concurrently, we need to remove the tswap() calls -- which use a fixed per-binary endianness. Get the endianness of the CPU accessed using the libisa xtensa_isa_is_big_endian() call and replace the tswap() calls by bswap() ones when necessary. Signed-off-by: Philippe Mathieu-Daudé --- target/xtensa/xtensa-semi.c | 16 ++++++++++++++-- 1 file changed, 14 insertions(+), 2 deletions(-) diff --git a/target/xtensa/xtensa-semi.c b/target/xtensa/xtensa-semi.c index fa21b7e11fc..21d23e39de5 100644 --- a/target/xtensa/xtensa-semi.c +++ b/target/xtensa/xtensa-semi.c @@ -328,10 +328,17 @@ void HELPER(simcall)(CPUXtensaState *env) struct timeval tv = {0}; if (target_tv) { + bool cpu_big_endian = xtensa_isa_is_big_endian(env->config->isa); + bool swap_needed = HOST_BIG_ENDIAN != cpu_big_endian; + cpu_memory_rw_debug(cs, target_tv, (uint8_t *)target_tvv, sizeof(target_tvv), 0); - tv.tv_sec = (int32_t)tswap32(target_tvv[0]); - tv.tv_usec = (int32_t)tswap32(target_tvv[1]); + if (swap_needed) { + bswap32s(&target_tvv[0]); + bswap32s(&target_tvv[1]); + } + tv.tv_sec = (int32_t)target_tvv[0]; + tv.tv_usec = (int32_t)target_tvv[1]; } if (fd < 3 && sim_console) { if ((fd == 1 || fd == 2) && rq == SELECT_ONE_WRITE) { @@ -381,6 +388,8 @@ void HELPER(simcall)(CPUXtensaState *env) int argc = semihosting_get_argc(); int str_offset = (argc + 1) * sizeof(uint32_t); int i; + bool cpu_big_endian = xtensa_isa_is_big_endian(env->config->isa); + bool swap_needed = HOST_BIG_ENDIAN != cpu_big_endian; uint32_t argptr; for (i = 0; i < argc; ++i) { @@ -388,6 +397,9 @@ void HELPER(simcall)(CPUXtensaState *env) int str_size = strlen(str) + 1; argptr = tswap32(regs[3] + str_offset); + if (swap_needed) { + bswap32s(&argptr); + } cpu_memory_rw_debug(cs, regs[3] + i * sizeof(uint32_t),