From patchwork Fri Dec 6 03:12:20 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 847821 Delivered-To: patch@linaro.org Received: by 2002:a5d:50c2:0:b0:385:e875:8a9e with SMTP id f2csp570084wrt; Thu, 5 Dec 2024 19:14:38 -0800 (PST) X-Forwarded-Encrypted: i=2; AJvYcCV8O0p8vDIdFd8/qEFcKwneY5/j3B9qJAm/qD0aZqKv6cNHSjv+uiKQBpbOjgmrOGcTFwaWAw==@linaro.org X-Google-Smtp-Source: AGHT+IHzab5PuVDQkD1PFdkuAJ9txXQj+mPs00vH13HUl/oFi2Jmb+XO79PwqoZ81Nra0TTiQ5bf X-Received: by 2002:a05:620a:2449:b0:7b6:7133:b8a3 with SMTP id af79cd13be357-7b6bcaddc15mr227500085a.20.1733454878497; Thu, 05 Dec 2024 19:14:38 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1733454878; cv=none; d=google.com; s=arc-20240605; b=BwabdTaJQkA2q/3ByE6pAoULOQWWLzfZJPwurVMj1JtBfeCbg1U4cjZve90R/8ZQ2k gj63lL5GsjWpFjZPTaCXypDCcBqjRfOeZPMunD+oPRDQkhBXh6/6N24HAab8A2g0JRih 8D1LgVZoDab3yXV1AE0bWNqGL6tkfy4f3JY/zes4DbQpSPcb2cFXPRvGjCcH7Dl7XwUx LlrAIeV404sok1HwV9x+L6ozEyXKXDcZBApWadFimk0bD52NK/PZdaUnAx8BYIzk9mz9 LHR67nOR7YDhV7GVKenx2HhPVOE71uf1p8SGpswIhQNiHFCt6M00e3DxDBQIcHMebj3O jxtg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20240605; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=E0jKLOU5UZBplVg49+yB8JnyalOGaPnD33fBMrjs59A=; fh=9Ev+QBUhk6P6vR3LT1wYeDLexozsz44nqjfoyPajZCc=; b=SgDgc6fK3aQZkAY0mk+0Osgb5ABAUT+LWHxNBTdH68qx/laQN8P73krtyoWqT7j2VA AqmdGvb4K0ejm6Z1ZbYOj61KSzQzex3v3akBkfE0QBwRzft4khkHeyYxhhgSfvH+hRTe KkbzRW+Ql26lPKoiObqZw4R+ihhPpAlr1l/F8g9Hd2eT5QeGMMixJqU0gmzTVddx+uij tbuN06qwnuvR4KadpwCZ4QAIdIJi4HfbXcKwuJeO0S+Yj3mQPCI0k7DaazXuuk3n8LbH +M5prWUNwCwc9e3IcJOVDYkpbPbpTtBapb7hfV5hqV7i/idGxT3oJNTWq/f4quJsM3ot 2XOg==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=DFYheKuv; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org; dara=neutral header.i=@linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id af79cd13be357-7b6b5a480absi333039585a.42.2024.12.05.19.14.38 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Thu, 05 Dec 2024 19:14:38 -0800 (PST) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=DFYheKuv; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org; dara=neutral header.i=@linaro.org Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1tJOlm-0006pW-J9; Thu, 05 Dec 2024 22:12:42 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1tJOlj-0006o4-Qg for qemu-devel@nongnu.org; Thu, 05 Dec 2024 22:12:39 -0500 Received: from mail-ot1-x336.google.com ([2607:f8b0:4864:20::336]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1tJOlh-0004Rs-4n for qemu-devel@nongnu.org; Thu, 05 Dec 2024 22:12:39 -0500 Received: by mail-ot1-x336.google.com with SMTP id 46e09a7af769-71d5af465b7so463439a34.2 for ; Thu, 05 Dec 2024 19:12:36 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1733454756; x=1734059556; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=E0jKLOU5UZBplVg49+yB8JnyalOGaPnD33fBMrjs59A=; b=DFYheKuve0FNnZxOsaQz53EvEEtuPSQlCy3Xtul4Ub3IhxPyvoKJtUiXLQq3wTXUQO z5OFbjpc3C4jHANVvM9ox/JgYyd3qAoAkGVobuxulZgQcyzD4E4RWdHsGd6rnOSgAlJx 8KN6/BdcmiDdXs1sF0t4Rn5ySdxMUzozOiPFcIjJFQP2YLNXLnsPNkQIo3K7KSLe7gXx 8mw54aG6e1lE0sqXuswHNyQTLilaQU2bmNnfTL0M9GaA7WH00/C433RvSP7sN79+LlHm MPyy5r6wbw5aV64pHC3JVoiw01bmC9c429/NHX5x/ddM0dLhjG4A90qQLe6b4Dl23a40 Gw1g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1733454756; x=1734059556; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=E0jKLOU5UZBplVg49+yB8JnyalOGaPnD33fBMrjs59A=; b=RYHwBztYjgThJ0CXp9euXHzkCS/YDL+YHsVTiMHjQpHjkV0pUJ1RVyCbX8n98TLFqK DUxcw1SGtt8Zq05lINaxs/NXwNYYWVGC/N75EtmDkjVAdkVME1Amg9+hqxWWDBStiKN9 BUeXBltiuqnrO8jkUtfjM5Bh72DzoD+XpBGT79gSNScrQ26OZCAuUKGHhBd3l2Xc3Pqx POa477v216jvl01X3lpm5wFxt8v/TS+mF59iWvAjE0GP/gIfPDyugfWWldl2WlwDzcNj 7ek+XMCt5h7qjj8CK0d298rEQKqeh7ZiO+OyB6V+6oT0uKFCLgxQsvEUy/NJRr0Kf0dq 4VFw== X-Gm-Message-State: AOJu0YxewKH7NWgUCcEv+OlrY6mKx/kFM/jOBRVkAg53Cc1Cf8tzhXqw s+r+4D1RZKuP2HRZwpWrRcIWq49hXni7ZEDrkTggayZBmT5CcB5Z2H1ngmnnSvwCubORvMLW9+J iONkCpXjv X-Gm-Gg: ASbGncuJRUx9blGQRvfrwCTdVsVGqxcVLaWLy5hhSWksu5vTYd8IAnN8qzbEsUvJOUg HiFuFxVOpgyDsnyszys6sBi4MP91BjI14ijaEJe3JpGzLjB/RmRXDjqH++R0t7LHzkn/U/vRITA X2XWjtK1rRUmB3HHO9W6p/wQuRl6LF88vEsMRasFf87+yQwEwuIWv47puwYulRY2tkDPtjbu67h Gz1gseHewYPL0rnu/RyzhUtnPmjMbmIBfDWNDdWLtuuj04XsXEuoF2HZe3EgQV68pXaqjv8sHB8 FrOODmGkhJa/PjyCs3CSg2S32XxHg7OcKoS7 X-Received: by 2002:a05:6830:2a06:b0:703:7827:6a68 with SMTP id 46e09a7af769-71dcf4f54a1mr838502a34.6.1733454755982; Thu, 05 Dec 2024 19:12:35 -0800 (PST) Received: from localhost.localdomain (fixed-187-189-51-143.totalplay.net. [187.189.51.143]) by smtp.gmail.com with ESMTPSA id 46e09a7af769-71dc493b2dfsm596442a34.9.2024.12.05.19.12.34 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 05 Dec 2024 19:12:35 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Cc: qemu-arm@nongnu.org Subject: [PATCH 5/9] target/arm: Convert neon_helper.c to fpst alias Date: Thu, 5 Dec 2024 21:12:20 -0600 Message-ID: <20241206031224.78525-6-richard.henderson@linaro.org> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20241206031224.78525-1-richard.henderson@linaro.org> References: <20241206031224.78525-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::336; envelope-from=richard.henderson@linaro.org; helo=mail-ot1-x336.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Signed-off-by: Richard Henderson Reviewed-by: Philippe Mathieu-Daudé --- target/arm/helper.h | 14 +++++++------- target/arm/tcg/neon_helper.c | 21 +++++++-------------- 2 files changed, 14 insertions(+), 21 deletions(-) diff --git a/target/arm/helper.h b/target/arm/helper.h index 3e78b90658..db8b8dc748 100644 --- a/target/arm/helper.h +++ b/target/arm/helper.h @@ -428,13 +428,13 @@ DEF_HELPER_FLAGS_2(neon_qneg_s16, TCG_CALL_NO_RWG, i32, env, i32) DEF_HELPER_FLAGS_2(neon_qneg_s32, TCG_CALL_NO_RWG, i32, env, i32) DEF_HELPER_FLAGS_2(neon_qneg_s64, TCG_CALL_NO_RWG, i64, env, i64) -DEF_HELPER_3(neon_ceq_f32, i32, i32, i32, ptr) -DEF_HELPER_3(neon_cge_f32, i32, i32, i32, ptr) -DEF_HELPER_3(neon_cgt_f32, i32, i32, i32, ptr) -DEF_HELPER_3(neon_acge_f32, i32, i32, i32, ptr) -DEF_HELPER_3(neon_acgt_f32, i32, i32, i32, ptr) -DEF_HELPER_3(neon_acge_f64, i64, i64, i64, ptr) -DEF_HELPER_3(neon_acgt_f64, i64, i64, i64, ptr) +DEF_HELPER_3(neon_ceq_f32, i32, i32, i32, fpst) +DEF_HELPER_3(neon_cge_f32, i32, i32, i32, fpst) +DEF_HELPER_3(neon_cgt_f32, i32, i32, i32, fpst) +DEF_HELPER_3(neon_acge_f32, i32, i32, i32, fpst) +DEF_HELPER_3(neon_acgt_f32, i32, i32, i32, fpst) +DEF_HELPER_3(neon_acge_f64, i64, i64, i64, fpst) +DEF_HELPER_3(neon_acgt_f64, i64, i64, i64, fpst) /* iwmmxt_helper.c */ DEF_HELPER_2(iwmmxt_maddsq, i64, i64, i64) diff --git a/target/arm/tcg/neon_helper.c b/target/arm/tcg/neon_helper.c index c687e882ad..99fbebbe14 100644 --- a/target/arm/tcg/neon_helper.c +++ b/target/arm/tcg/neon_helper.c @@ -1180,51 +1180,44 @@ uint64_t HELPER(neon_qneg_s64)(CPUARMState *env, uint64_t x) * Note that EQ doesn't signal InvalidOp for QNaNs but GE and GT do. * Softfloat routines return 0/1, which we convert to the 0/-1 Neon requires. */ -uint32_t HELPER(neon_ceq_f32)(uint32_t a, uint32_t b, void *fpstp) +uint32_t HELPER(neon_ceq_f32)(uint32_t a, uint32_t b, float_status *fpst) { - float_status *fpst = fpstp; return -float32_eq_quiet(make_float32(a), make_float32(b), fpst); } -uint32_t HELPER(neon_cge_f32)(uint32_t a, uint32_t b, void *fpstp) +uint32_t HELPER(neon_cge_f32)(uint32_t a, uint32_t b, float_status *fpst) { - float_status *fpst = fpstp; return -float32_le(make_float32(b), make_float32(a), fpst); } -uint32_t HELPER(neon_cgt_f32)(uint32_t a, uint32_t b, void *fpstp) +uint32_t HELPER(neon_cgt_f32)(uint32_t a, uint32_t b, float_status *fpst) { - float_status *fpst = fpstp; return -float32_lt(make_float32(b), make_float32(a), fpst); } -uint32_t HELPER(neon_acge_f32)(uint32_t a, uint32_t b, void *fpstp) +uint32_t HELPER(neon_acge_f32)(uint32_t a, uint32_t b, float_status *fpst) { - float_status *fpst = fpstp; float32 f0 = float32_abs(make_float32(a)); float32 f1 = float32_abs(make_float32(b)); return -float32_le(f1, f0, fpst); } -uint32_t HELPER(neon_acgt_f32)(uint32_t a, uint32_t b, void *fpstp) +uint32_t HELPER(neon_acgt_f32)(uint32_t a, uint32_t b, float_status *fpst) { - float_status *fpst = fpstp; float32 f0 = float32_abs(make_float32(a)); float32 f1 = float32_abs(make_float32(b)); return -float32_lt(f1, f0, fpst); } -uint64_t HELPER(neon_acge_f64)(uint64_t a, uint64_t b, void *fpstp) +uint64_t HELPER(neon_acge_f64)(uint64_t a, uint64_t b, float_status *fpst) { - float_status *fpst = fpstp; float64 f0 = float64_abs(make_float64(a)); float64 f1 = float64_abs(make_float64(b)); return -float64_le(f1, f0, fpst); } -uint64_t HELPER(neon_acgt_f64)(uint64_t a, uint64_t b, void *fpstp) +uint64_t HELPER(neon_acgt_f64)(uint64_t a, uint64_t b, float_status *fpst) { - float_status *fpst = fpstp; float64 f0 = float64_abs(make_float64(a)); float64 f1 = float64_abs(make_float64(b)); return -float64_lt(f1, f0, fpst);