@@ -133,9 +133,9 @@ DEF_HELPER_3(vfp_maxnumd, f64, f64, f64, ptr)
DEF_HELPER_3(vfp_minnumh, f16, f16, f16, ptr)
DEF_HELPER_3(vfp_minnums, f32, f32, f32, ptr)
DEF_HELPER_3(vfp_minnumd, f64, f64, f64, ptr)
-DEF_HELPER_2(vfp_sqrth, f16, f16, env)
-DEF_HELPER_2(vfp_sqrts, f32, f32, env)
-DEF_HELPER_2(vfp_sqrtd, f64, f64, env)
+DEF_HELPER_2(vfp_sqrth, f16, f16, ptr)
+DEF_HELPER_2(vfp_sqrts, f32, f32, ptr)
+DEF_HELPER_2(vfp_sqrtd, f64, f64, ptr)
DEF_HELPER_3(vfp_cmph, void, f16, f16, env)
DEF_HELPER_3(vfp_cmps, void, f32, f32, env)
DEF_HELPER_3(vfp_cmpd, void, f64, f64, env)
@@ -8401,8 +8401,8 @@ static void handle_fp_1src_single(DisasContext *s, int opcode, int rd, int rn)
switch (opcode) {
case 0x3: /* FSQRT */
- gen_helper_vfp_sqrts(tcg_res, tcg_op, tcg_env);
- goto done;
+ gen_fpst = gen_helper_vfp_sqrts;
+ break;
case 0x6: /* BFCVT */
gen_fpst = gen_helper_bfcvt;
break;
@@ -8450,7 +8450,6 @@ static void handle_fp_1src_single(DisasContext *s, int opcode, int rd, int rn)
gen_fpst(tcg_res, tcg_op, fpst);
}
- done:
write_fp_sreg(s, rd, tcg_res);
}
@@ -8467,8 +8466,8 @@ static void handle_fp_1src_double(DisasContext *s, int opcode, int rd, int rn)
switch (opcode) {
case 0x3: /* FSQRT */
- gen_helper_vfp_sqrtd(tcg_res, tcg_op, tcg_env);
- goto done;
+ gen_fpst = gen_helper_vfp_sqrtd;
+ break;
case 0x8: /* FRINTN */
case 0x9: /* FRINTP */
case 0xa: /* FRINTM */
@@ -8513,7 +8512,6 @@ static void handle_fp_1src_double(DisasContext *s, int opcode, int rd, int rn)
gen_fpst(tcg_res, tcg_op, fpst);
}
- done:
write_fp_dreg(s, rd, tcg_res);
}
@@ -9459,7 +9457,7 @@ static void handle_2misc_64(DisasContext *s, int opcode, bool u,
gen_vfp_negd(tcg_rd, tcg_rn);
break;
case 0x7f: /* FSQRT */
- gen_helper_vfp_sqrtd(tcg_rd, tcg_rn, tcg_env);
+ gen_helper_vfp_sqrtd(tcg_rd, tcg_rn, tcg_fpstatus);
break;
case 0x1a: /* FCVTNS */
case 0x1b: /* FCVTMS */
@@ -10402,6 +10400,7 @@ static void disas_simd_two_reg_misc(DisasContext *s, uint32_t insn)
handle_2misc_fcmp_zero(s, opcode, false, u, is_q, size, rn, rd);
return;
case 0x7f: /* FSQRT */
+ need_fpstatus = true;
if (size == 3 && !is_q) {
unallocated_encoding(s);
return;
@@ -10631,7 +10630,7 @@ static void disas_simd_two_reg_misc(DisasContext *s, uint32_t insn)
gen_vfp_negs(tcg_res, tcg_op);
break;
case 0x7f: /* FSQRT */
- gen_helper_vfp_sqrts(tcg_res, tcg_op, tcg_env);
+ gen_helper_vfp_sqrts(tcg_res, tcg_op, tcg_fpstatus);
break;
case 0x1a: /* FCVTNS */
case 0x1b: /* FCVTMS */
@@ -2424,17 +2424,17 @@ DO_VFP_2OP(VNEG, dp, gen_vfp_negd, aa32_fpdp_v2)
static void gen_VSQRT_hp(TCGv_i32 vd, TCGv_i32 vm)
{
- gen_helper_vfp_sqrth(vd, vm, tcg_env);
+ gen_helper_vfp_sqrth(vd, vm, fpstatus_ptr(FPST_FPCR_F16));
}
static void gen_VSQRT_sp(TCGv_i32 vd, TCGv_i32 vm)
{
- gen_helper_vfp_sqrts(vd, vm, tcg_env);
+ gen_helper_vfp_sqrts(vd, vm, fpstatus_ptr(FPST_FPCR));
}
static void gen_VSQRT_dp(TCGv_i64 vd, TCGv_i64 vm)
{
- gen_helper_vfp_sqrtd(vd, vm, tcg_env);
+ gen_helper_vfp_sqrtd(vd, vm, fpstatus_ptr(FPST_FPCR));
}
DO_VFP_2OP(VSQRT, hp, gen_VSQRT_hp, aa32_fp16_arith)
@@ -314,19 +314,19 @@ VFP_BINOP(minnum)
VFP_BINOP(maxnum)
#undef VFP_BINOP
-dh_ctype_f16 VFP_HELPER(sqrt, h)(dh_ctype_f16 a, CPUARMState *env)
+dh_ctype_f16 VFP_HELPER(sqrt, h)(dh_ctype_f16 a, void *fpstp)
{
- return float16_sqrt(a, &env->vfp.fp_status_f16);
+ return float16_sqrt(a, fpstp);
}
-float32 VFP_HELPER(sqrt, s)(float32 a, CPUARMState *env)
+float32 VFP_HELPER(sqrt, s)(float32 a, void *fpstp)
{
- return float32_sqrt(a, &env->vfp.fp_status);
+ return float32_sqrt(a, fpstp);
}
-float64 VFP_HELPER(sqrt, d)(float64 a, CPUARMState *env)
+float64 VFP_HELPER(sqrt, d)(float64 a, void *fpstp)
{
- return float64_sqrt(a, &env->vfp.fp_status);
+ return float64_sqrt(a, fpstp);
}
static void softfloat_to_vfp_compare(CPUARMState *env, FloatRelation cmp)