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([187.217.227.247]) by smtp.gmail.com with ESMTPSA id 5614622812f47-3ebb478a497sm3545b6e.10.2024.12.13.11.14.06 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 13 Dec 2024 11:14:07 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Cc: "Michael S. Tsirkin" , Marcel Apfelbaum Subject: [PATCH 48/71] hw/pci: Constify all Property Date: Fri, 13 Dec 2024 13:07:22 -0600 Message-ID: <20241213190750.2513964-53-richard.henderson@linaro.org> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20241213190750.2513964-1-richard.henderson@linaro.org> References: <20241213190750.2513964-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::c36; envelope-from=richard.henderson@linaro.org; helo=mail-oo1-xc36.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Signed-off-by: Richard Henderson --- hw/pci/pci.c | 2 +- hw/pci/pci_bridge.c | 2 +- hw/pci/pci_host.c | 2 +- hw/pci/pcie_port.c | 4 ++-- 4 files changed, 5 insertions(+), 5 deletions(-) diff --git a/hw/pci/pci.c b/hw/pci/pci.c index 1416ae202c..c38b674211 100644 --- a/hw/pci/pci.c +++ b/hw/pci/pci.c @@ -80,7 +80,7 @@ static const PropertyInfo prop_pci_busnr = { .get = prop_pci_busnr_get, }; -static Property pci_props[] = { +static const Property pci_props[] = { DEFINE_PROP_PCI_DEVFN("addr", PCIDevice, devfn, -1), DEFINE_PROP_STRING("romfile", PCIDevice, romfile), DEFINE_PROP_UINT32("romsize", PCIDevice, romsize, UINT32_MAX), diff --git a/hw/pci/pci_bridge.c b/hw/pci/pci_bridge.c index 2c7bb1a525..dd4fd3674f 100644 --- a/hw/pci/pci_bridge.c +++ b/hw/pci/pci_bridge.c @@ -477,7 +477,7 @@ int pci_bridge_qemu_reserve_cap_init(PCIDevice *dev, int cap_offset, return 0; } -static Property pci_bridge_properties[] = { +static const Property pci_bridge_properties[] = { DEFINE_PROP_BOOL("x-pci-express-writeable-slt-bug", PCIBridge, pcie_writeable_slt_bug, false), DEFINE_PROP_END_OF_LIST(), diff --git a/hw/pci/pci_host.c b/hw/pci/pci_host.c index dfe6fe6184..321e7be709 100644 --- a/hw/pci/pci_host.c +++ b/hw/pci/pci_host.c @@ -240,7 +240,7 @@ const VMStateDescription vmstate_pcihost = { } }; -static Property pci_host_properties_common[] = { +static const Property pci_host_properties_common[] = { DEFINE_PROP_BOOL("x-config-reg-migration-enabled", PCIHostState, mig_enabled, true), DEFINE_PROP_BOOL(PCI_HOST_BYPASS_IOMMU, PCIHostState, bypass_iommu, false), diff --git a/hw/pci/pcie_port.c b/hw/pci/pcie_port.c index 9f978ba164..bac2822e98 100644 --- a/hw/pci/pcie_port.c +++ b/hw/pci/pcie_port.c @@ -111,7 +111,7 @@ void pcie_chassis_del_slot(PCIESlot *s) QLIST_REMOVE(s, next); } -static Property pcie_port_props[] = { +static const Property pcie_port_props[] = { DEFINE_PROP_UINT8("port", PCIEPort, port, 0), DEFINE_PROP_UINT16("aer_log_max", PCIEPort, parent_obj.parent_obj.exp.aer_log.log_max, @@ -204,7 +204,7 @@ static const TypeInfo pcie_port_type_info = { .class_init = pcie_port_class_init, }; -static Property pcie_slot_props[] = { +static const Property pcie_slot_props[] = { DEFINE_PROP_UINT8("chassis", PCIESlot, chassis, 0), DEFINE_PROP_UINT16("slot", PCIESlot, slot, 0), DEFINE_PROP_BOOL("hotplug", PCIESlot, hotplug, true),