From patchwork Sun Dec 15 19:04:47 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 850975 Delivered-To: patch@linaro.org Received: by 2002:a05:6000:2c4:b0:385:e875:8a9e with SMTP id o4csp2520737wry; Sun, 15 Dec 2024 11:08:32 -0800 (PST) X-Forwarded-Encrypted: i=2; AJvYcCXm/Lj7oP+b1NI85qLsp+88WnHTOc76FW8Qi7SZuQtEvmprtp81n5NGwT2TvM6mKe2PKRsJdA==@linaro.org X-Google-Smtp-Source: AGHT+IF+DP2UQFeKg7Sl/2mZkNeeJdXxFD8sfY71gW1cWWqrjfiEGw3sAx/qsz8i1oLGxdb8sSGe X-Received: by 2002:a05:620a:2605:b0:7b6:cdd4:bdea with SMTP id af79cd13be357-7b6fbee6edemr1599843885a.23.1734289712514; Sun, 15 Dec 2024 11:08:32 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1734289712; cv=none; d=google.com; s=arc-20240605; b=QjxJI+NIO3DCXzb2OVu6uVcqwIGbjkHlehXoEI4NRengRQeCpYeeVvgz1LFmiFw6Vr WLvx5E3qVWCuLAAEKZIIqg21JmDTYSMHjDidNeQJGyvnIEZ44YipHFPjDEuHLT3E1mBY eHbVwjiLvjDBhqBriG+V+Ci0HUulcfpm1JQUhZjSs50VHfLO0J+87KLi74d749XCl1Yw DX84y4WV+tbq/SasXyV130PFkcg3edwtkD6MJqCq8qlWLVcjPSbHGjhI38IlXp3genpQ bJhYnBtSLcGA1UoG6e+phhNNmXzFsv7SLOCac38ERAu4LI1wgulRTSUKOoXQV01s7weO jf4w== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20240605; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=Onf0PGU0mdWT869pO9aPdv4Isif7mSe2YqGwVARTFhY=; fh=vkIKEHcwKJya0eJ7ZEuSZlQ+z9UQVjOKAU0iaZuC/Ks=; b=aHyPYJoSbXDCgXZw2GjNfvvDEZ4vLt9yW1qcOanrVhuIObYzhhpiL1WUhrhxxilUVn w9GBv5GQnQ1AjQBNN9HH5jlbBqKozFyE9nFJAkRcsbtcfPT6T8Urj/rM9FaJfDSCxfri A8VBNl7svzwn7SEGsbJ6U4ZLYqmRsn6Yx3bJwUnd5qDKw9U2MasFkpllYx2F6ibtlUmD qaQF/81nx9o1c2YzzEsIa37JyVdPSizaZrgqyQmC3AA6F69hqc8Ps2QyTMV09RENYmXM 65WYJv3JhlJvnRL9e0SKRwpidhLiJ7sVc8xadaK9IgHCehlPxSWoWiiG729MMOKvF9O7 Mn8w==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=fDyEW8sP; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org; dara=neutral header.i=@linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id af79cd13be357-7b7048e4763si584885185a.551.2024.12.15.11.08.32 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Sun, 15 Dec 2024 11:08:32 -0800 (PST) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=fDyEW8sP; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org; dara=neutral header.i=@linaro.org Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1tMtwY-0001LJ-UU; Sun, 15 Dec 2024 14:06:20 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1tMtwT-0001J9-6p for qemu-devel@nongnu.org; Sun, 15 Dec 2024 14:06:13 -0500 Received: from mail-oo1-xc2f.google.com ([2607:f8b0:4864:20::c2f]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1tMtwQ-00016w-JP for qemu-devel@nongnu.org; Sun, 15 Dec 2024 14:06:12 -0500 Received: by mail-oo1-xc2f.google.com with SMTP id 006d021491bc7-5f2e13cb356so1711363eaf.2 for ; Sun, 15 Dec 2024 11:06:09 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1734289569; x=1734894369; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=Onf0PGU0mdWT869pO9aPdv4Isif7mSe2YqGwVARTFhY=; b=fDyEW8sPpHsY8nyANHbmTr3BLByk/TuQQovxfHFwGYej4hID+yH6Y5ENwG8Ed/UTy/ sZDsCLoZutaIPNmURkPOfYOOUM/G++v/mp71Bn878tVO/JQKQXKphVnmQM6PmIKehYYE SzRApyMFphc+cq8AD9NuoAl9EIU0uD9Zsdj1X1b5UU0JhTiASi921iXLLP3+GrkHcFbq jzTUQ3cknlc8kyFNRWw/tGp9iaXokVSo4ZgNjEkRBsbV/vpVTq8oqxaTSCDwMi9MOlPa qpOKjS5qwdbXxIfXAqoFYA0OdVPPeRAdMKAD33VZNWYdfppvr2TXf5US0q/SSPiKtifQ mT7Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1734289569; x=1734894369; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=Onf0PGU0mdWT869pO9aPdv4Isif7mSe2YqGwVARTFhY=; b=Bvyj3qcljCuMC56Y21Tt4nJEiM3sLo7ex5XrPUQB1veQiWQciJsmv7vSx0H+SrTNIf rThM/hcvu2mJZo9SLOiWZa2K1BZuMGO9TCGXUoHl9nyJyveOS2f4Q85eXurxSkVPG+VA rJOXmZkfig393GTfXnfwyflyNrOamRqBq9ZjhTguc2DBdfvbzvR0/l8VdyAK3+CJ4z3b MU1sykxmw9W2+9apJQYKbmibsJ2Pg/5WhkjxmBN/qI3tR6P4E3v7l9Casvch9GgjI2R4 xS2qDM4iv7F1Gw5D2Jq45ZSZp3KIvNbzIwZuzmQNLxu/y+mdIYfN2hTtIC3wrYFUp+XP eLoQ== X-Gm-Message-State: AOJu0Yz0XinqTnsFsR15rjkac+naz0hkI4mF1aPTkHkwyk6rLyex5QcU 9qkZGp6Rn9nBsP7HqEZB9WpmKbJqpSVCniFMGLgNkLzglFF+M66NeSSDbHEd/aP/ABQVoLjyMR4 E1CJIJbIr X-Gm-Gg: ASbGncuwUPAT+K/1HaKLgaZs33v4V4oahjC6qmNx7OveqNEJihxHb+2ZPmq+b5m1GX/ A6cYvStI05m5p7MXEebJDF2oOFqKpTZKavYg3mUWuvF1I3xQR1Hy4U6V8lqT1F+6/He8h25PX4I sw7/yKVvqYVsh6wpxVqp7rzpSzJjY9zTBl6aQKvGNXVmFplGXF1UZKzuHU4kfx9D4M7p9a3JR2W sFxGydfdsHjg2hq3gdoo9dJ7bLEXYuedl02Gh0G06NUm9o90t0mrvB4unrczWiuCl3jtZ/om22B GqCoP4rOMHbY9t9osxHjnw1UIT08M7BBWmQiK2LufkU= X-Received: by 2002:a05:6870:414c:b0:2a3:c59d:f09d with SMTP id 586e51a60fabf-2a3c59f6a81mr4816084fac.14.1734289568951; Sun, 15 Dec 2024 11:06:08 -0800 (PST) Received: from localhost.localdomain (fixed-187-189-51-143.totalplay.net. [187.189.51.143]) by smtp.gmail.com with ESMTPSA id 586e51a60fabf-2a3d2914ac6sm1423214fac.39.2024.12.15.11.06.07 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 15 Dec 2024 11:06:08 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Cc: stefanha@redhat.com, =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Subject: [PULL 21/67] hw/cpu: Constify all Property Date: Sun, 15 Dec 2024 13:04:47 -0600 Message-ID: <20241215190533.3222854-22-richard.henderson@linaro.org> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20241215190533.3222854-1-richard.henderson@linaro.org> References: <20241215190533.3222854-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::c2f; envelope-from=richard.henderson@linaro.org; helo=mail-oo1-xc2f.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Reviewed-by: Philippe Mathieu-Daudé Signed-off-by: Richard Henderson --- hw/cpu/a15mpcore.c | 2 +- hw/cpu/a9mpcore.c | 2 +- hw/cpu/arm11mpcore.c | 2 +- hw/cpu/cluster.c | 2 +- hw/cpu/realview_mpcore.c | 2 +- 5 files changed, 5 insertions(+), 5 deletions(-) diff --git a/hw/cpu/a15mpcore.c b/hw/cpu/a15mpcore.c index 967d8d3dd5..5346b8b6c6 100644 --- a/hw/cpu/a15mpcore.c +++ b/hw/cpu/a15mpcore.c @@ -144,7 +144,7 @@ static void a15mp_priv_realize(DeviceState *dev, Error **errp) } } -static Property a15mp_priv_properties[] = { +static const Property a15mp_priv_properties[] = { DEFINE_PROP_UINT32("num-cpu", A15MPPrivState, num_cpu, 1), /* The Cortex-A15MP may have anything from 0 to 224 external interrupt * IRQ lines (with another 32 internal). We default to 128+32, which diff --git a/hw/cpu/a9mpcore.c b/hw/cpu/a9mpcore.c index c30ef72c66..c3fdfb92e1 100644 --- a/hw/cpu/a9mpcore.c +++ b/hw/cpu/a9mpcore.c @@ -158,7 +158,7 @@ static void a9mp_priv_realize(DeviceState *dev, Error **errp) } } -static Property a9mp_priv_properties[] = { +static const Property a9mp_priv_properties[] = { DEFINE_PROP_UINT32("num-cpu", A9MPPrivState, num_cpu, 1), /* The Cortex-A9MP may have anything from 0 to 224 external interrupt * IRQ lines (with another 32 internal). We default to 64+32, which diff --git a/hw/cpu/arm11mpcore.c b/hw/cpu/arm11mpcore.c index 89c4e35143..193fc182ab 100644 --- a/hw/cpu/arm11mpcore.c +++ b/hw/cpu/arm11mpcore.c @@ -131,7 +131,7 @@ static void mpcore_priv_initfn(Object *obj) object_initialize_child(obj, "wdtimer", &s->wdtimer, TYPE_ARM_MPTIMER); } -static Property mpcore_priv_properties[] = { +static const Property mpcore_priv_properties[] = { DEFINE_PROP_UINT32("num-cpu", ARM11MPCorePriveState, num_cpu, 1), /* The ARM11 MPCORE TRM says the on-chip controller may have * anything from 0 to 224 external interrupt IRQ lines (with another diff --git a/hw/cpu/cluster.c b/hw/cpu/cluster.c index 61289a840d..8e43621b5c 100644 --- a/hw/cpu/cluster.c +++ b/hw/cpu/cluster.c @@ -25,7 +25,7 @@ #include "hw/qdev-properties.h" #include "qapi/error.h" -static Property cpu_cluster_properties[] = { +static const Property cpu_cluster_properties[] = { DEFINE_PROP_UINT32("cluster-id", CPUClusterState, cluster_id, 0), DEFINE_PROP_END_OF_LIST() }; diff --git a/hw/cpu/realview_mpcore.c b/hw/cpu/realview_mpcore.c index 72c792eef1..9a0ff1df86 100644 --- a/hw/cpu/realview_mpcore.c +++ b/hw/cpu/realview_mpcore.c @@ -108,7 +108,7 @@ static void mpcore_rirq_init(Object *obj) } } -static Property mpcore_rirq_properties[] = { +static const Property mpcore_rirq_properties[] = { DEFINE_PROP_UINT32("num-cpu", mpcore_rirq_state, num_cpu, 1), DEFINE_PROP_END_OF_LIST(), };