diff mbox series

[09/11] accel/tcg: Fix tlb_set_page_with_attrs, tlb_set_page

Message ID 20250205040341.2056361-10-richard.henderson@linaro.org
State New
Headers show
Series tcg: Cleanups after disallowing 64-on-32 | expand

Commit Message

Richard Henderson Feb. 5, 2025, 4:03 a.m. UTC 
The declarations use vaddr for size.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
 accel/tcg/cputlb.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

Comments

Philippe Mathieu-Daudé Feb. 12, 2025, 7:22 a.m. UTC | #1 
On 5/2/25 05:03, Richard Henderson wrote:
> The declarations use vaddr for size.

Which seems dubious, since TARGET_PAGE_SIZE is int IIUC.

> 
> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
> ---
>   accel/tcg/cputlb.c | 4 ++--
>   1 file changed, 2 insertions(+), 2 deletions(-)
> 
> diff --git a/accel/tcg/cputlb.c b/accel/tcg/cputlb.c
> index 17e2251695..75d075d044 100644
> --- a/accel/tcg/cputlb.c
> +++ b/accel/tcg/cputlb.c
> @@ -1193,7 +1193,7 @@ void tlb_set_page_full(CPUState *cpu, int mmu_idx,
>   
>   void tlb_set_page_with_attrs(CPUState *cpu, vaddr addr,
>                                hwaddr paddr, MemTxAttrs attrs, int prot,
> -                             int mmu_idx, uint64_t size)
> +                             int mmu_idx, vaddr size)
>   {
>       CPUTLBEntryFull full = {
>           .phys_addr = paddr,
> @@ -1208,7 +1208,7 @@ void tlb_set_page_with_attrs(CPUState *cpu, vaddr addr,
>   
>   void tlb_set_page(CPUState *cpu, vaddr addr,
>                     hwaddr paddr, int prot,
> -                  int mmu_idx, uint64_t size)
> +                  int mmu_idx, vaddr size)
>   {
>       tlb_set_page_with_attrs(cpu, addr, paddr, MEMTXATTRS_UNSPECIFIED,
>                               prot, mmu_idx, size);
diff mbox series

Patch

diff --git a/accel/tcg/cputlb.c b/accel/tcg/cputlb.c
index 17e2251695..75d075d044 100644
--- a/accel/tcg/cputlb.c
+++ b/accel/tcg/cputlb.c
@@ -1193,7 +1193,7 @@  void tlb_set_page_full(CPUState *cpu, int mmu_idx,
 
 void tlb_set_page_with_attrs(CPUState *cpu, vaddr addr,
                              hwaddr paddr, MemTxAttrs attrs, int prot,
-                             int mmu_idx, uint64_t size)
+                             int mmu_idx, vaddr size)
 {
     CPUTLBEntryFull full = {
         .phys_addr = paddr,
@@ -1208,7 +1208,7 @@  void tlb_set_page_with_attrs(CPUState *cpu, vaddr addr,
 
 void tlb_set_page(CPUState *cpu, vaddr addr,
                   hwaddr paddr, int prot,
-                  int mmu_idx, uint64_t size)
+                  int mmu_idx, vaddr size)
 {
     tlb_set_page_with_attrs(cpu, addr, paddr, MEMTXATTRS_UNSPECIFIED,
                             prot, mmu_idx, size);