From patchwork Thu Feb 6 19:56:32 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 862544 Delivered-To: patch@linaro.org Received: by 2002:a5d:51d2:0:b0:385:e875:8a9e with SMTP id n18csp285172wrv; Thu, 6 Feb 2025 12:00:55 -0800 (PST) X-Forwarded-Encrypted: i=2; AJvYcCX4np2DF0B6BYa3becg//WOcaw5t2sJbPgsxKinpPcN33eSiZmSmaBvNbNQligyQ7GmnDTg4Q==@linaro.org X-Google-Smtp-Source: AGHT+IEp9Qot4tv7QGFyHKzGbVwQ9za66N4h+ZphQJUe+EQTj/+X/ZMTYSne6fbRGW43Xw/aWSpr X-Received: by 2002:a05:6122:54f:b0:517:4fb0:749c with SMTP id 71dfb90a1353d-51f2e0db3f1mr658612e0c.3.1738872055220; Thu, 06 Feb 2025 12:00:55 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1738872055; cv=none; d=google.com; s=arc-20240605; b=M0TDVDCAcJ5ac2pPLVl414bHZTHsdsCgcVdOkUFcGKRBq5FVV1HXYJmDITYXJSwwI3 C61+5ZF8HYb2jhmy29atBFY2fL6AL1IagRpnATiNsTQ3AhHucSmB90q/WNvWn4fsy2AI tBfEx+p34YdG7UUCU2GktBzT6MKDxVBhIy8MwakoysGMo+Jbvgt5wzew8YU9N79KrlYI wlgu9xxEVQFn1/GGonUgkJNkRImKVFdsS09jdarR4wflmgE3y8WoZY81mjzrVzFfGjep KMXXpu547Qsaz3GZaDaNE3mRM4OexWP+BX1pRSnRPpAy2bSolit3QUh+QqdqbxfOTwiP P9lA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20240605; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=K/KRFheEnFJgkLqHH8Ou/wv5NETcBB8J6PUtxw1iYZg=; fh=9Ev+QBUhk6P6vR3LT1wYeDLexozsz44nqjfoyPajZCc=; b=DfYn/SGpPhkfrraDqTVKEqJop+NtNOw6M5q3JIkBEyVZSqmFewjrFAnT/+GMQu9WcS GVElfeiZbvaHUxR9Us1Q6qEztmQmsUf4TyoawY+Ta7hOWGHDb6o29YHO2qbbVQigUzHs U6ipEUN4hMSOg5loq3ZNEHgMNwAksrj3xfiaI5WiJ2JbzeuUp/vbKuUXH9W+/6m+2NZ8 7uDa+VT9U2RK2+Q7Q6xzYlcEdLdwcfamMGNm+7BKECm9/lCUA43JlfUZUj6CP8ndAERc aeQ0NyHnVXLDQEUgYmNaJu6w8cOuq+7/P9m++ozK+5jM1H226cB6rn8x8xo7OMHbYQUD YL7g==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=pDOOGLDa; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org; dara=neutral header.i=@linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id 71dfb90a1353d-51f2273833csi388430e0c.36.2025.02.06.12.00.55 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Thu, 06 Feb 2025 12:00:55 -0800 (PST) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=pDOOGLDa; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org; dara=neutral header.i=@linaro.org Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1tg80o-0007qD-KZ; Thu, 06 Feb 2025 14:58:11 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1tg80D-0007Dt-7M for qemu-devel@nongnu.org; Thu, 06 Feb 2025 14:57:33 -0500 Received: from mail-pl1-x631.google.com ([2607:f8b0:4864:20::631]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1tg80B-0000WI-8A for qemu-devel@nongnu.org; Thu, 06 Feb 2025 14:57:32 -0500 Received: by mail-pl1-x631.google.com with SMTP id d9443c01a7336-21f3c119fe6so23477985ad.0 for ; Thu, 06 Feb 2025 11:57:30 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1738871850; x=1739476650; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=K/KRFheEnFJgkLqHH8Ou/wv5NETcBB8J6PUtxw1iYZg=; b=pDOOGLDaOloKfJQLZsxP7MI4pSUo2nBAZBB1tqk3NMnt9VcZ1m+MPf9Zn0fZZtIHaI /038sUh5Vr4et2gp/4JBEbSjUpDDif5SCXl+VjCxEfjJKZ38dmuyq3PVW1SnYKdRFy6+ nKJ6KjmgHmZpPPB65Wa1F7BpM31cK8tjg7g7+/QfQnFfoy1E8XoKeKt1gifhU0HwoFeZ Ru23msmQEAR3sTCxApo0S3n8kIWdI8fyeh7Ef/lvzebuTh05aZ8HtuTE90j+bvb419Sj 7zDnV3coapa9+l/Q8aMVXSNhcDuFBqBJuQhnPt3Ff/ETmhjeBOwLfrqnqY3qDeWX4mzk b8kQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1738871850; x=1739476650; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=K/KRFheEnFJgkLqHH8Ou/wv5NETcBB8J6PUtxw1iYZg=; b=FohKc6G2d5dpGVDK8rmM/7ziydkEHStWDNUoHEJseSUeCuETlTgWkq8CPvwJWQMSA4 nLgFQYNttH2CKA/nyhqL6IWmbpCBCA+7+EVhHt/gOJ7GkVuzdaG9sn4/G0MKuJyRAN+C 3Tn7wAKZqx/z1Vho8l1Ljkvv7Miex/8M7C3iQRQaR60i8OOPBR8iDuljThNgVodjyGPV z9pDNxE63e8TLoZIx8vZ06zZmg7h3qMSlF9je4Uket0sbSDgPh2OyeZ7mnZxQPqI7KVP +jkvKtZO8hmF0dNSE5KU7/k4vbigdBMFDhU8gfDvU/Afak/ndbHDfcmXiFPjhx8le99+ oryg== X-Gm-Message-State: AOJu0Yyruk6ebF8PZyP2fiEUQDIKS8uW2XG/AzG8xZlhw1GgEWHlUkX8 zTEQ28qZqgZz6y+dxZlEoYARaGmmzDmvlumHj51ldanAasJMs1XalWcMvSqRWHVgYoeUqb8ed06 / X-Gm-Gg: ASbGnctaUbBIinHY2N3OVK7oepwAyaK8AYKJXufGZOCmp187EkV7oZVyJwGBwA2DPZ6 EyE7wepD0mHbgA1THSxXKRT3/64rkUbIhw4SC4VlmbMz6s2KkPnFFxC7oCsLiR7Jap1uQZ9nzKl t9Z9dg025RhE5SbkMgeyKaER1K4rSwTJONxxD/CS+h1FMbp4JpZclpoAKhGgHL/wKEV0sWZA7y+ Y2mA2ecpLc+y2QxripGVouLDj/l3LNDVBVaG9KXL0WQ031shVsCwMPrCa6L6IefP07upv4i/Ls0 eZPes1wDem25qMChQANDMDlKr8lueepO0CN9Rq/HpjPdIYo= X-Received: by 2002:a05:6a00:4fc7:b0:71e:4cff:2654 with SMTP id d2e1a72fcca58-7305d44a475mr737768b3a.6.1738871849859; Thu, 06 Feb 2025 11:57:29 -0800 (PST) Received: from stoup.. (71-212-39-66.tukw.qwest.net. [71.212.39.66]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-73048c16370sm1666993b3a.152.2025.02.06.11.57.29 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 06 Feb 2025 11:57:29 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Cc: qemu-arm@nongnu.org Subject: [PATCH 18/61] target/arm: Split get_tile_rowcol argument tile_index Date: Thu, 6 Feb 2025 11:56:32 -0800 Message-ID: <20250206195715.2150758-19-richard.henderson@linaro.org> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250206195715.2150758-1-richard.henderson@linaro.org> References: <20250206195715.2150758-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::631; envelope-from=richard.henderson@linaro.org; helo=mail-pl1-x631.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Decode tile number and index offset beforehand and separately. Signed-off-by: Richard Henderson --- target/arm/tcg/translate-sme.c | 17 +++++-------- target/arm/tcg/sme.decode | 46 +++++++++++++++++++++++----------- 2 files changed, 38 insertions(+), 25 deletions(-) diff --git a/target/arm/tcg/translate-sme.c b/target/arm/tcg/translate-sme.c index 13314c5cd7..bd6095ffb6 100644 --- a/target/arm/tcg/translate-sme.c +++ b/target/arm/tcg/translate-sme.c @@ -41,15 +41,10 @@ static bool sme2_zt0_enabled_check(DisasContext *s) return true; } -/* - * Resolve tile.size[index] to a host pointer, where tile and index - * are always decoded together, dependent on the element size. - */ +/* Resolve tile.size[rs+imm] to a host pointer. */ static TCGv_ptr get_tile_rowcol(DisasContext *s, int esz, int rs, - int tile_index, bool vertical) + int tile, int imm, bool vertical) { - int tile = tile_index >> (4 - esz); - int index = esz == MO_128 ? 0 : extract32(tile_index, 0, 4 - esz); int pos, len, offset; TCGv_i32 tmp; TCGv_ptr addr; @@ -57,7 +52,7 @@ static TCGv_ptr get_tile_rowcol(DisasContext *s, int esz, int rs, /* Compute the final index, which is Rs+imm. */ tmp = tcg_temp_new_i32(); tcg_gen_trunc_tl_i32(tmp, cpu_reg(s, rs)); - tcg_gen_addi_i32(tmp, tmp, index); + tcg_gen_addi_i32(tmp, tmp, imm); /* Prepare a power-of-two modulo via extraction of @len bits. */ len = ctz32(streaming_vec_reg_size(s)) - esz; @@ -185,7 +180,7 @@ static bool trans_MOVA(DisasContext *s, arg_MOVA *a) return true; } - t_za = get_tile_rowcol(s, a->esz, a->rs, a->za_imm, a->v); + t_za = get_tile_rowcol(s, a->esz, a->rs, a->za, a->off, a->v); t_zr = vec_full_reg_ptr(s, a->zr); t_pg = pred_full_reg_ptr(s, a->pg); @@ -264,7 +259,7 @@ static bool trans_LDST1(DisasContext *s, arg_LDST1 *a) return true; } - t_za = get_tile_rowcol(s, a->esz, a->rs, a->za_imm, a->v); + t_za = get_tile_rowcol(s, a->esz, a->rs, a->za, a->off, a->v); t_pg = pred_full_reg_ptr(s, a->pg); addr = tcg_temp_new_i64(); @@ -295,7 +290,7 @@ static bool do_ldst_r(DisasContext *s, arg_ldstr *a, GenLdStR *fn) } /* ZA[n] equates to ZA0H.B[n]. */ - base = get_tile_rowcol(s, MO_8, a->rv, imm, false); + base = get_tile_rowcol(s, MO_8, a->rv, 0, imm, false); fn(s, base, 0, svl, a->rn, imm * svl); return true; diff --git a/target/arm/tcg/sme.decode b/target/arm/tcg/sme.decode index 83ca6a9104..efe369e079 100644 --- a/target/arm/tcg/sme.decode +++ b/target/arm/tcg/sme.decode @@ -27,17 +27,29 @@ ZERO_zt0 11000000 01 001 00000000000 00000001 ### SME Move into/from Array %mova_rs 13:2 !function=plus_12 -&mova esz rs pg zr za_imm v:bool to_vec:bool +&mova esz rs pg zr za off v:bool to_vec:bool -MOVA 11000000 esz:2 00000 0 v:1 .. pg:3 zr:5 0 za_imm:4 \ - &mova to_vec=0 rs=%mova_rs -MOVA 11000000 11 00000 1 v:1 .. pg:3 zr:5 0 za_imm:4 \ - &mova to_vec=0 rs=%mova_rs esz=4 +MOVA 11000000 00 00000 0 v:1 .. pg:3 zr:5 0 off:4 \ + &mova to_vec=0 rs=%mova_rs esz=0 za=0 +MOVA 11000000 01 00000 0 v:1 .. pg:3 zr:5 0 za:1 off:3 \ + &mova to_vec=0 rs=%mova_rs esz=1 +MOVA 11000000 10 00000 0 v:1 .. pg:3 zr:5 0 za:2 off:2 \ + &mova to_vec=0 rs=%mova_rs esz=2 +MOVA 11000000 11 00000 0 v:1 .. pg:3 zr:5 0 za:3 off:1 \ + &mova to_vec=0 rs=%mova_rs esz=3 +MOVA 11000000 11 00000 1 v:1 .. pg:3 zr:5 0 za:4 \ + &mova to_vec=0 rs=%mova_rs esz=4 off=0 -MOVA 11000000 esz:2 00001 0 v:1 .. pg:3 0 za_imm:4 zr:5 \ - &mova to_vec=1 rs=%mova_rs -MOVA 11000000 11 00001 1 v:1 .. pg:3 0 za_imm:4 zr:5 \ - &mova to_vec=1 rs=%mova_rs esz=4 +MOVA 11000000 00 00001 0 v:1 .. pg:3 0 off:4 zr:5 \ + &mova to_vec=1 rs=%mova_rs esz=0 za=0 +MOVA 11000000 01 00001 0 v:1 .. pg:3 0 za:1 off:3 zr:5 \ + &mova to_vec=1 rs=%mova_rs esz=1 +MOVA 11000000 10 00001 0 v:1 .. pg:3 0 za:2 off:2 zr:5 \ + &mova to_vec=1 rs=%mova_rs esz=2 +MOVA 11000000 11 00001 0 v:1 .. pg:3 0 za:3 off:1 zr:5 \ + &mova to_vec=1 rs=%mova_rs esz=3 +MOVA 11000000 11 00001 1 v:1 .. pg:3 0 za:4 zr:5 \ + &mova to_vec=1 rs=%mova_rs esz=4 off=0 ### SME Move into/from ZT0 @@ -46,12 +58,18 @@ MOVT_ztr 1100 0000 0100 1110 0 off:3 00 11111 rt:5 ### SME Memory -&ldst esz rs pg rn rm za_imm v:bool st:bool +&ldst esz rs pg rn rm za off v:bool st:bool -LDST1 1110000 0 esz:2 st:1 rm:5 v:1 .. pg:3 rn:5 0 za_imm:4 \ - &ldst rs=%mova_rs -LDST1 1110000 111 st:1 rm:5 v:1 .. pg:3 rn:5 0 za_imm:4 \ - &ldst esz=4 rs=%mova_rs +LDST1 1110000 0 00 st:1 rm:5 v:1 .. pg:3 rn:5 0 off:4 \ + &ldst rs=%mova_rs esz=0 za=0 +LDST1 1110000 0 01 st:1 rm:5 v:1 .. pg:3 rn:5 0 za:1 off:3 \ + &ldst rs=%mova_rs esz=1 +LDST1 1110000 0 10 st:1 rm:5 v:1 .. pg:3 rn:5 0 za:2 off:2 \ + &ldst rs=%mova_rs esz=2 +LDST1 1110000 0 11 st:1 rm:5 v:1 .. pg:3 rn:5 0 za:3 off:1 \ + &ldst rs=%mova_rs esz=3 +LDST1 1110000 1 11 st:1 rm:5 v:1 .. pg:3 rn:5 0 za:4 \ + &ldst rs=%mova_rs esz=4 off=0 &ldstr rv rn imm @ldstr ....... ... . ...... .. ... rn:5 . imm:4 \