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[88.187.86.199]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-390e485d6dbsm21356258f8f.82.2025.03.05.07.40.37 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Wed, 05 Mar 2025 07:40:38 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: =?utf-8?q?Daniel_P=2E_Berrang=C3=A9?= , Paolo Bonzini , Richard Henderson , Pierrick Bouvier , Thomas Huth , =?utf-8?q?Alex_Benn=C3=A9e?= , =?utf-8?q?Philippe_M?= =?utf-8?q?athieu-Daud=C3=A9?= Subject: [RFC PATCH 14/18] hw/xtensa/xtfpga: Check endianness via legacy_binary_is_big_endian() Date: Wed, 5 Mar 2025 16:39:24 +0100 Message-ID: <20250305153929.43687-15-philmd@linaro.org> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20250305153929.43687-1-philmd@linaro.org> References: <20250305153929.43687-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::433; envelope-from=philmd@linaro.org; helo=mail-wr1-x433.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org For legacy binaries, legacy_binary_is_big_endian() is equivalent of the compile time TARGET_BIG_ENDIAN definition. Signed-off-by: Philippe Mathieu-Daudé --- hw/xtensa/xtfpga.c | 12 +++++++----- 1 file changed, 7 insertions(+), 5 deletions(-) diff --git a/hw/xtensa/xtfpga.c b/hw/xtensa/xtfpga.c index 3f3677f1c9a..7f0a849b795 100644 --- a/hw/xtensa/xtfpga.c +++ b/hw/xtensa/xtfpga.c @@ -27,6 +27,7 @@ #include "qemu/osdep.h" #include "qemu/units.h" +#include "qemu/legacy_binary_info.h" #include "qapi/error.h" #include "cpu.h" #include "system/system.h" @@ -238,6 +239,7 @@ static void xtfpga_init(const XtfpgaBoardDesc *board, MachineState *machine) uint32_t freq = 10000000; int n; unsigned int smp_cpus = machine->smp.cpus; + bool is_big_endian = legacy_binary_is_big_endian(); if (smp_cpus > 1) { mx_pic = xtensa_mx_pic_init(31); @@ -311,7 +313,7 @@ static void xtfpga_init(const XtfpgaBoardDesc *board, MachineState *machine) dinfo = drive_get(IF_PFLASH, 0, 0); if (dinfo) { - flash = xtfpga_flash_init(system_io, board, dinfo, TARGET_BIG_ENDIAN); + flash = xtfpga_flash_init(system_io, board, dinfo, is_big_endian); } /* Use presence of kernel file name as 'boot from SRAM' switch. */ @@ -399,7 +401,7 @@ static void xtfpga_init(const XtfpgaBoardDesc *board, MachineState *machine) uint64_t elf_entry; int success = load_elf(kernel_filename, NULL, translate_phys_addr, cpu, &elf_entry, NULL, NULL, NULL, - TARGET_BIG_ENDIAN ? ELFDATA2MSB : ELFDATA2LSB, + is_big_endian ? ELFDATA2MSB : ELFDATA2LSB, EM_XTENSA, 0, 0); if (success > 0) { entry_point = elf_entry; @@ -437,9 +439,9 @@ static void xtfpga_init(const XtfpgaBoardDesc *board, MachineState *machine) 0x21, 0xfe, 0xff, /* l32r a2, entry_a2 */ 0xa0, 0x00, 0x00, /* jx a0 */ }; - const size_t boot_sz = TARGET_BIG_ENDIAN ? sizeof(boot_be) - : sizeof(boot_le); - uint8_t *boot = TARGET_BIG_ENDIAN ? boot_be : boot_le; + const size_t boot_sz = is_big_endian ? sizeof(boot_be) + : sizeof(boot_le); + uint8_t *boot = is_big_endian ? boot_be : boot_le; uint32_t entry_pc = tswap32(entry_point); uint32_t entry_a2 = tswap32(tagptr);