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[PULL,06/21] target/arm: Make CNTPS_* UNDEF from Secure EL1 when Secure EL2 is enabled

Message ID 20250307150708.3222813-7-peter.maydell@linaro.org
State Accepted
Commit bdd641541fbef0a27bf9f60e7eba6f8a31d4706c
Headers show
Series [PULL,01/21] hw/arm/smmu-common: Remove the repeated ttb field | expand

Commit Message

Peter Maydell March 7, 2025, 3:06 p.m. UTC 
When we added Secure EL2 support, we missed that this needs an update
to the access code for the EL3 physical timer registers.  These are
supposed to UNDEF from Secure EL1 when Secure EL2 is enabled.

(Note for stable backporting: for backports to branches where
CP_ACCESS_UNDEFINED is not defined, the old name to use instead
is CP_ACCESS_TRAP_UNCATEGORIZED.)

Cc: qemu-stable@nongnu.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Message-id: 20250204125009.2281315-4-peter.maydell@linaro.org
---
 target/arm/helper.c | 3 +++
 1 file changed, 3 insertions(+)
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Patch

diff --git a/target/arm/helper.c b/target/arm/helper.c
index 5729b313f84..5b6de446ace 100644
--- a/target/arm/helper.c
+++ b/target/arm/helper.c
@@ -2387,6 +2387,9 @@  static CPAccessResult gt_stimer_access(CPUARMState *env,
         if (!arm_is_secure(env)) {
             return CP_ACCESS_UNDEFINED;
         }
+        if (arm_is_el2_enabled(env)) {
+            return CP_ACCESS_UNDEFINED;
+        }
         if (!(env->cp15.scr_el3 & SCR_ST)) {
             return CP_ACCESS_TRAP_EL3;
         }