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[88.187.86.199]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-43cf7b88494sm20159685e9.0.2025.03.09.17.06.59 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Sun, 09 Mar 2025 17:07:00 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: BALATON Zoltan , qemu-devel@nongnu.org Cc: Steven Lee , Joel Stanley , Bernhard Beschow , Peter Maydell , qemu-arm@nongnu.org, Andrey Smirnov , Paolo Bonzini , Bin Meng , =?utf-8?q?C=C3=A9dric_Le_Goater?= , Eduardo Habkost , qemu-ppc@nongnu.org, =?utf-8?q?Danie?= =?utf-8?q?l_P=2E_Berrang=C3=A9?= , Guenter Roeck , Andrew Jeffery , Troy Lee , Jean-Christophe Dubois , =?utf-8?q?Philippe_Mathieu-Da?= =?utf-8?q?ud=C3=A9?= , qemu-block@nongnu.org, Jamin Lin Subject: [PATCH v5 07/14] hw/sd/sdhci: Make quirks a class property Date: Mon, 10 Mar 2025 01:06:13 +0100 Message-ID: <20250310000620.70120-8-philmd@linaro.org> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20250310000620.70120-1-philmd@linaro.org> References: <20250310000620.70120-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::335; envelope-from=philmd@linaro.org; helo=mail-wm1-x335.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Allow to enforce implementations quirks by the class. All TYPE_IMX_USDHC instances use the quirk: move it to the class layer. Signed-off-by: Philippe Mathieu-Daudé --- include/hw/sd/sdhci.h | 2 ++ hw/sd/sdhci.c | 12 +++++++++++- 2 files changed, 13 insertions(+), 1 deletion(-) diff --git a/include/hw/sd/sdhci.h b/include/hw/sd/sdhci.h index c42aeab6848..ee1e7ef4b10 100644 --- a/include/hw/sd/sdhci.h +++ b/include/hw/sd/sdhci.h @@ -116,6 +116,8 @@ struct SDHCIClass { PCIDeviceClass pci_parent_class; SysBusDeviceClass sbd_parent_class; }; + + uint32_t quirks; }; /* diff --git a/hw/sd/sdhci.c b/hw/sd/sdhci.c index 176bee6b8f5..570d825d130 100644 --- a/hw/sd/sdhci.c +++ b/hw/sd/sdhci.c @@ -1427,6 +1427,7 @@ void sdhci_initfn(SDHCIState *s) sdhci_raise_insertion_irq, s); s->transfer_timer = timer_new_ns(QEMU_CLOCK_VIRTUAL, sdhci_data_transfer, s); + s->quirks = s->sc->quirks; s->io_ops = &sdhci_mmio_le_ops; } @@ -1888,7 +1889,15 @@ static void imx_usdhc_init(Object *obj) SDHCIState *s = SYSBUS_SDHCI(obj); s->io_ops = &usdhc_mmio_ops; - s->quirks = BIT(SDHCI_QUIRK_NO_BUSY_IRQ); +} + +static void imx_usdhc_class_init(ObjectClass *oc, void *data) +{ + SDHCIClass *sc = SYSBUS_SDHCI_CLASS(oc); + + sc->quirks = BIT(SDHCI_QUIRK_NO_BUSY_IRQ); + + sdhci_common_class_init(oc, data); } /* --- qdev Samsung s3c --- */ @@ -1969,6 +1978,7 @@ static const TypeInfo sdhci_types[] = { .name = TYPE_IMX_USDHC, .parent = TYPE_SYSBUS_SDHCI, .instance_init = imx_usdhc_init, + .class_init = imx_usdhc_class_init, }, { .name = TYPE_S3C_SDHCI,