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[88.187.86.199]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-4405b4f3df8sm61241055e9.24.2025.04.17.09.54.36 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Thu, 17 Apr 2025 09:54:36 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Paolo Bonzini , Yanan Wang , =?utf-8?q?Marc-Andr=C3=A9_Lureau?= , Zhao Liu , Marcel Apfelbaum , =?utf-8?q?Daniel_P=2E_Berran?= =?utf-8?q?g=C3=A9?= , =?utf-8?q?Philippe_Mathieu-Daud?= =?utf-8?q?=C3=A9?= , Eduardo Habkost , Richard Henderson , Pierrick Bouvier Subject: [PATCH 1/7] qemu: Introduce target_cpu_type() Date: Thu, 17 Apr 2025 18:54:24 +0200 Message-ID: <20250417165430.58213-2-philmd@linaro.org> X-Mailer: git-send-email 2.47.1 In-Reply-To: <20250417165430.58213-1-philmd@linaro.org> References: <20250417165430.58213-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::330; envelope-from=philmd@linaro.org; helo=mail-wm1-x330.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Introduce the target_cpu_type() helper to access the CPU_RESOLVING_TYPE target-specific definition from target-agnostic code. Reviewed-by: Pierrick Bouvier Signed-off-by: Philippe Mathieu-Daudé --- MAINTAINERS | 2 ++ meson.build | 2 ++ include/qemu/target_info.h | 19 +++++++++++++++++++ target_info-defs.c | 16 ++++++++++++++++ 4 files changed, 39 insertions(+) create mode 100644 include/qemu/target_info.h create mode 100644 target_info-defs.c diff --git a/MAINTAINERS b/MAINTAINERS index c7083ab1d93..07ca088f7e8 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -495,6 +495,7 @@ F: include/exec/cpu*.h F: include/exec/exec-all.h F: include/exec/target_long.h F: include/qemu/accel.h +F: include/qemu/target_info.h F: include/system/accel-*.h F: include/system/cpus.h F: include/accel/accel-cpu-target.h @@ -503,6 +504,7 @@ F: accel/Makefile.objs F: accel/stubs/Makefile.objs F: cpu-common.c F: cpu-target.c +F: target_info-defs.c F: system/cpus.c Apple Silicon HVF CPUs diff --git a/meson.build b/meson.build index bcb9d39a387..ad324d46428 100644 --- a/meson.build +++ b/meson.build @@ -3807,6 +3807,8 @@ endif common_ss.add(pagevary) specific_ss.add(files('page-target.c', 'page-vary-target.c')) +specific_ss.add(files('target_info-defs.c')) + subdir('backends') subdir('disas') subdir('migration') diff --git a/include/qemu/target_info.h b/include/qemu/target_info.h new file mode 100644 index 00000000000..a53e632e735 --- /dev/null +++ b/include/qemu/target_info.h @@ -0,0 +1,19 @@ +/* + * QEMU binary/target helpers + * + * Copyright (c) Linaro + * + * SPDX-License-Identifier: GPL-2.0-or-later + */ + +#ifndef QEMU_TARGET_INFO_H +#define QEMU_TARGET_INFO_H + +/** + * target_cpu_type: + * + * Returns: target CPU base QOM type name (i.e. TYPE_X86_CPU). + */ +const char *target_cpu_type(void); + +#endif diff --git a/target_info-defs.c b/target_info-defs.c new file mode 100644 index 00000000000..3ee89469855 --- /dev/null +++ b/target_info-defs.c @@ -0,0 +1,16 @@ +/* + * QEMU binary/target helpers (target specific) + * + * Copyright (c) Linaro + * + * SPDX-License-Identifier: GPL-2.0-or-later + */ + +#include "qemu/osdep.h" +#include "qemu/target_info.h" +#include "cpu.h" + +const char *target_cpu_type(void) +{ + return CPU_RESOLVING_TYPE; +}