diff mbox series

[PULL,065/148] accel/tcg: Rebuild full flags in tlb_reset_dirty_range_locked

Message ID 20250424004934.598783-66-richard.henderson@linaro.org
State Accepted
Commit f05d251906a335465a5c5b3a6ffcdce96eca54f4
Headers show
Series [PULL,001/148] exec/tswap: target code can use TARGET_BIG_ENDIAN instead of target_words_bigendian() | expand

Commit Message

Richard Henderson April 24, 2025, 12:48 a.m. UTC 
Undo the split between inline and slow flags before masking.

Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
 accel/tcg/cputlb.c | 5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)
diff mbox series

Patch

diff --git a/accel/tcg/cputlb.c b/accel/tcg/cputlb.c
index 5df98d93d0..28c47d4872 100644
--- a/accel/tcg/cputlb.c
+++ b/accel/tcg/cputlb.c
@@ -886,9 +886,10 @@  static void tlb_reset_dirty_range_locked(CPUTLBEntryFull *full, CPUTLBEntry *ent
                                          uintptr_t start, uintptr_t length)
 {
     const uintptr_t addr = ent->addr_write;
+    int flags = addr | full->slow_flags[MMU_DATA_STORE];
 
-    if ((addr & (TLB_INVALID_MASK | TLB_MMIO |
-                 TLB_DISCARD_WRITE | TLB_NOTDIRTY)) == 0) {
+    flags &= TLB_INVALID_MASK | TLB_MMIO | TLB_DISCARD_WRITE | TLB_NOTDIRTY;
+    if (flags == 0) {
         uintptr_t host = (addr & TARGET_PAGE_MASK) + ent->addend;
         if ((host - start) < length) {
             qatomic_set(&ent->addr_write, addr | TLB_NOTDIRTY);