| Message ID | 20250525160220.222154-10-richard.henderson@linaro.org |
|---|---|
| State | New |
| Headers | show |
| Series | target/microblaze: Always use TARGET_LONG_BITS == 32 | expand |
On Sun, May 25, 2025 at 05:02:19PM +0100, Richard Henderson wrote: > Return a constant 0 from reg_for_read, and a new > temporary from reg_for_write. > > Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Edgar E. Iglesias <edgar.iglesias@amd.com> > --- > target/microblaze/translate.c | 24 ++---------------------- > 1 file changed, 2 insertions(+), 22 deletions(-) > > diff --git a/target/microblaze/translate.c b/target/microblaze/translate.c > index dc597b36e6..047d97e2c5 100644 > --- a/target/microblaze/translate.c > +++ b/target/microblaze/translate.c > @@ -63,9 +63,6 @@ typedef struct DisasContext { > DisasContextBase base; > const MicroBlazeCPUConfig *cfg; > > - TCGv_i32 r0; > - bool r0_set; > - > /* Decoder. */ > uint32_t ext_imm; > unsigned int tb_flags; > @@ -179,14 +176,7 @@ static TCGv_i32 reg_for_read(DisasContext *dc, int reg) > if (likely(reg != 0)) { > return cpu_R[reg]; > } > - if (!dc->r0_set) { > - if (dc->r0 == NULL) { > - dc->r0 = tcg_temp_new_i32(); > - } > - tcg_gen_movi_i32(dc->r0, 0); > - dc->r0_set = true; > - } > - return dc->r0; > + return tcg_constant_i32(0); > } > > static TCGv_i32 reg_for_write(DisasContext *dc, int reg) > @@ -194,10 +184,7 @@ static TCGv_i32 reg_for_write(DisasContext *dc, int reg) > if (likely(reg != 0)) { > return cpu_R[reg]; > } > - if (dc->r0 == NULL) { > - dc->r0 = tcg_temp_new_i32(); > - } > - return dc->r0; > + return tcg_temp_new_i32(); > } > > static bool do_typea(DisasContext *dc, arg_typea *arg, bool side_effects, > @@ -1635,8 +1622,6 @@ static void mb_tr_init_disas_context(DisasContextBase *dcb, CPUState *cs) > dc->cfg = &cpu->cfg; > dc->tb_flags = dc->base.tb->flags; > dc->ext_imm = dc->base.tb->cs_base; > - dc->r0 = NULL; > - dc->r0_set = false; > dc->mem_index = cpu_mmu_index(cs, false); > dc->jmp_cond = dc->tb_flags & D_FLAG ? TCG_COND_ALWAYS : TCG_COND_NEVER; > dc->jmp_dest = -1; > @@ -1675,11 +1660,6 @@ static void mb_tr_translate_insn(DisasContextBase *dcb, CPUState *cs) > trap_illegal(dc, true); > } > > - if (dc->r0) { > - dc->r0 = NULL; > - dc->r0_set = false; > - } > - > /* Discard the imm global when its contents cannot be used. */ > if ((dc->tb_flags & ~dc->tb_flags_to_set) & IMM_FLAG) { > tcg_gen_discard_i32(cpu_imm); > -- > 2.43.0 >
diff --git a/target/microblaze/translate.c b/target/microblaze/translate.c index dc597b36e6..047d97e2c5 100644 --- a/target/microblaze/translate.c +++ b/target/microblaze/translate.c @@ -63,9 +63,6 @@ typedef struct DisasContext { DisasContextBase base; const MicroBlazeCPUConfig *cfg; - TCGv_i32 r0; - bool r0_set; - /* Decoder. */ uint32_t ext_imm; unsigned int tb_flags; @@ -179,14 +176,7 @@ static TCGv_i32 reg_for_read(DisasContext *dc, int reg) if (likely(reg != 0)) { return cpu_R[reg]; } - if (!dc->r0_set) { - if (dc->r0 == NULL) { - dc->r0 = tcg_temp_new_i32(); - } - tcg_gen_movi_i32(dc->r0, 0); - dc->r0_set = true; - } - return dc->r0; + return tcg_constant_i32(0); } static TCGv_i32 reg_for_write(DisasContext *dc, int reg) @@ -194,10 +184,7 @@ static TCGv_i32 reg_for_write(DisasContext *dc, int reg) if (likely(reg != 0)) { return cpu_R[reg]; } - if (dc->r0 == NULL) { - dc->r0 = tcg_temp_new_i32(); - } - return dc->r0; + return tcg_temp_new_i32(); } static bool do_typea(DisasContext *dc, arg_typea *arg, bool side_effects, @@ -1635,8 +1622,6 @@ static void mb_tr_init_disas_context(DisasContextBase *dcb, CPUState *cs) dc->cfg = &cpu->cfg; dc->tb_flags = dc->base.tb->flags; dc->ext_imm = dc->base.tb->cs_base; - dc->r0 = NULL; - dc->r0_set = false; dc->mem_index = cpu_mmu_index(cs, false); dc->jmp_cond = dc->tb_flags & D_FLAG ? TCG_COND_ALWAYS : TCG_COND_NEVER; dc->jmp_dest = -1; @@ -1675,11 +1660,6 @@ static void mb_tr_translate_insn(DisasContextBase *dcb, CPUState *cs) trap_illegal(dc, true); } - if (dc->r0) { - dc->r0 = NULL; - dc->r0_set = false; - } - /* Discard the imm global when its contents cannot be used. */ if ((dc->tb_flags & ~dc->tb_flags_to_set) & IMM_FLAG) { tcg_gen_discard_i32(cpu_imm);
Return a constant 0 from reg_for_read, and a new temporary from reg_for_write. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> --- target/microblaze/translate.c | 24 ++---------------------- 1 file changed, 2 insertions(+), 22 deletions(-)