From patchwork Tue Jun 3 11:01:59 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Alex_Benn=C3=A9e?= X-Patchwork-Id: 893856 Delivered-To: patch@linaro.org Received: by 2002:adf:a2d4:0:b0:3a4:ee3f:8f15 with SMTP id t20csp238577wra; Tue, 3 Jun 2025 04:05:21 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCWgzYU7W3QoVt97zopBGlGzoLTPEAWuvDtojgqajQwywjEegbL1Z1aODGpTLlbDas2WJxIRrQ==@linaro.org X-Google-Smtp-Source: AGHT+IFFVsG8Aov+LP+Jl9fZT8VZl1CkWZLqwrERC9ATBHnFTSHdIuGudSScixR0ndDoP3qt1mCY X-Received: by 2002:a05:6102:1621:b0:4e6:67f6:e9af with SMTP id ada2fe7eead31-4e6e40f61acmr14974443137.9.1748948721465; Tue, 03 Jun 2025 04:05:21 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1748948721; cv=none; d=google.com; s=arc-20240605; b=QGTdt+/N8QYTrnMZZtgaAUcvKM9cMzIOsrkJrMQGlazQG5G7tq/WnyxIBVTqV6i0Uh BvOYu/KsiCFciY2bJu3nZGvv7r7phn7dUngOifCwOIW0o16PYNdnQ+V+h2qvkapL/+WX ejTnf7n7pV8MVB9McPVKcsV+8zZPPFJrQdkMjXal/wpxgmrphbyeBqLHQDZouP1Q13su txS2wwzxV92mZh0s2NeIwKPS0Zyg+GIOVj5/LsW9s8i8SGwzXqcb62DWnW4R6dQp6u82 QkFStaLEmPZ85pAxcXXo3qgR0lDsV16ypVPHACqS/Qa61rLk8xejRvWzK9iwXTUnGE3q bqZg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20240605; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=QqzHenzf9f+tp29aM4EXCHM2Myi+Q8QXd6lOEWCWJSY=; fh=i8+JJNkSTFxyu36tfnSGLD1mbgXco6YLrqB+jVxr2KA=; b=CbQWVhzkjQXiKcpQGUk4zSggeCipX7X8yVbEgCY0ZWIsqBiCGdHTLXJ7skJ80aG8+/ p45D0mXOeVcFceG5Cee5ZTS/QjRKheAEKw+lHfprFRZTgwKB24nJuvhjOtwg64nIzAIg YnoE/PL+iQySDcgTe8/TaL//prAy/0AhdeIFZArEpnZfj/yiIkYbLjtpPql9ZxuL9b3d iRq67izigpffVy0CbmkqIEOT2yhraP1muGnahhzw+oClgVNjvZatBOzZheEegvA9/brV B6puXKR8JIGc6vkYzd8sUTaxfVSr40d+j04R6iI/a7OhqhX92g38GjmLOZVuypZxVZ14 Hv2A==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=mK8fLa7z; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org; dara=neutral header.i=@linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id ada2fe7eead31-4e64ea2d0d0si3609666137.375.2025.06.03.04.05.21 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Tue, 03 Jun 2025 04:05:21 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=mK8fLa7z; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org; dara=neutral header.i=@linaro.org Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1uMPR9-0000f5-1v; Tue, 03 Jun 2025 07:04:13 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1uMPPO-00082v-LH for qemu-devel@nongnu.org; Tue, 03 Jun 2025 07:02:18 -0400 Received: from mail-ed1-x52b.google.com ([2a00:1450:4864:20::52b]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1uMPPJ-0002Bj-Pc for qemu-devel@nongnu.org; Tue, 03 Jun 2025 07:02:18 -0400 Received: by mail-ed1-x52b.google.com with SMTP id 4fb4d7f45d1cf-6049431b0e9so8856349a12.0 for ; Tue, 03 Jun 2025 04:02:13 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1748948532; x=1749553332; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=QqzHenzf9f+tp29aM4EXCHM2Myi+Q8QXd6lOEWCWJSY=; b=mK8fLa7zXzF5atbbc8FFArSWt5RMPjTypOIkXuwI4SQKItr7h9mtQcunotUA/jtb0n E6+dV4HhadeNxfUVT1cJvGwm6X9mqcG0FVrQqlljikVYSZCf45kxA6C4ZVGYpEAg86FA ttLivympfBcDRiOKZnHz2+XFW6cbme2/lHMXMwu4IDZwB4qz31mjacknI8tWr04w4Vmy P9PZ+p1IHGdOoXobbtUX0gp5ZotzNupiM4cy5VfDRg1i83N3daR/ssqBtxBHOBjLv7/s 1ULyzQm3jgedOr7+bnH7FCEQcHZarUArenTTX5Y51R5rMyiXYuaq3tO70U1ql1yKQxGq +rmA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1748948532; x=1749553332; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=QqzHenzf9f+tp29aM4EXCHM2Myi+Q8QXd6lOEWCWJSY=; b=azkOCjrU0z+rKkqR250ZG2AEf+FKmxm3Uf5UvncTe/RRXsFNTf1xm77jwfBWrlk5BJ kPpmCwr7QMfJt45GnS8Ksdf6WOuJ+OyCFi5RgH/xihcVIAdjCIlU8Th/NO0rRRnNSc7m 20aCGSijZHVSKt0PTEglEUIG0hC0p/sFJVuuiXpnwiUF7KY3ca7TLw/+I8HPQbaHsjsw Hy5DSHXuV5LKsP1mnTOSz8JHzZw2MK34FdyGuFi65uxtUEwvKzuKPnrrrTXKWGoOF+jL 8dMUsFKNyNKWc2aKpTFTkmuUvwt/IyllfefYsSIYlf97XFK0+0b5dFpTJECtyuol0kfw 91qw== X-Gm-Message-State: AOJu0Yyz68TelSTSd4n4PzfNi7ZvOhWkYnMCO/K9oXzJVvCoVUYFfkBU si4d3rlySFhxgz9/af7Hu1EveEKoYGVdyaEtY89xgWVLb6RshvjfwE0Bt/0rLJbHfzs= X-Gm-Gg: ASbGnctfSPbKz015Kz7lZO+B1BkgETvGWqy88MJYiscrdWhY48y7mrxD+cmMbXMCA5Q 8EJ5MY476cMT+wZHFguG+ShIdduuzOpxqMAcjvy7k+CB//Wbp3h3JehCfpgVbqYhoq38nw8SYTr sfHojWhnBrEJCAh6oVT4YsLjf71eBCLmYHp6fDgtcyM+dACHsLFPkeuYItqsIru7l2AHgYqCf5B DnT2xt8/Q7yhvZfXCSnEtfCAteKu1Ty+A6i7dYlSNCxdiW+SrZKSygyPAWgyPqZ+a0MfeLXm/Ju hrLCllhGvc0II6YfNRAsjqk6f0blQgOm38RDJQ9/o98QDlqpZKXj X-Received: by 2002:a17:907:2dac:b0:ad8:a329:b490 with SMTP id a640c23a62f3a-adb36b2447fmr1479784866b.23.1748948531810; Tue, 03 Jun 2025 04:02:11 -0700 (PDT) Received: from draig.lan ([185.126.160.19]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-adb497704a5sm544319666b.83.2025.06.03.04.02.07 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 03 Jun 2025 04:02:08 -0700 (PDT) Received: from draig.lan (localhost [IPv6:::1]) by draig.lan (Postfix) with ESMTP id 0AC585F9EB; Tue, 03 Jun 2025 12:02:06 +0100 (BST) From: =?utf-8?q?Alex_Benn=C3=A9e?= To: qemu-devel@nongnu.org Cc: Sriram Yagnaraman , Akihiko Odaki , "Michael S. Tsirkin" , Dmitry Osipenko , Paolo Bonzini , Peter Maydell , John Snow , =?utf-8?q?Marc-Andr=C3=A9_Lureau?= , Pierrick Bouvier , Peter Xu , =?utf-8?q?Alex_Benn=C3=A9e?= , Fabiano Rosas , qemu-arm@nongnu.org, Thomas Huth , Alexandre Iooss , Gustavo Romero , Markus Armbruster , David Hildenbrand , =?utf-8?q?Daniel_P=2E_Berrang=C3=A9?= , Laurent Vivier , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Mahmoud Mandour , Yiwei Zhang , qemu-stable@nongnu.org Subject: [PATCH v4 12/17] virtio-gpu: support context init multiple timeline Date: Tue, 3 Jun 2025 12:01:59 +0100 Message-ID: <20250603110204.838117-13-alex.bennee@linaro.org> X-Mailer: git-send-email 2.47.2 In-Reply-To: <20250603110204.838117-1-alex.bennee@linaro.org> References: <20250603110204.838117-1-alex.bennee@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::52b; envelope-from=alex.bennee@linaro.org; helo=mail-ed1-x52b.google.com X-Spam_score_int: 12 X-Spam_score: 1.2 X-Spam_bar: + X-Spam_report: (1.2 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_SBL_CSS=3.335, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org From: Yiwei Zhang Venus and later native contexts have their own fence context along with multiple timelines within. Fences wtih VIRTIO_GPU_FLAG_INFO_RING_IDX in the flags must be dispatched to be created on the target context. Fence signaling also has to be handled on the specific timeline within that target context. Before this change, venus fencing is completely broken if the host driver doesn't support implicit fencing with external memory objects. Frames can go backwards along with random artifacts on screen if the host driver doesn't attach an implicit fence to the render target. The symptom could be hidden by certain guest wsi backend that waits on a venus native VkFence object for the actual payload with limited present modes or under special configs. e.g. x11 mailbox or xwayland. After this change, everything related to venus fencing starts making sense. Confirmed this via guest and host side perfetto tracing. Cc: Fixes: 94d0ea1c1928 ("virtio-gpu: Support Venus context") Signed-off-by: Yiwei Zhang Reviewed-by: Dmitry Osipenko Message-Id: <20250518152651.334115-1-zzyiwei@gmail.com> [AJB: remove version history from commit message] Signed-off-by: Alex Bennée Tested-by: Dmitry Osipenko --- hw/display/virtio-gpu-virgl.c | 44 +++++++++++++++++++++++++++++++++++ 1 file changed, 44 insertions(+) diff --git a/hw/display/virtio-gpu-virgl.c b/hw/display/virtio-gpu-virgl.c index b4aa8abb96..cea2e12eb9 100644 --- a/hw/display/virtio-gpu-virgl.c +++ b/hw/display/virtio-gpu-virgl.c @@ -978,6 +978,15 @@ void virtio_gpu_virgl_process_cmd(VirtIOGPU *g, } trace_virtio_gpu_fence_ctrl(cmd->cmd_hdr.fence_id, cmd->cmd_hdr.type); +#if VIRGL_VERSION_MAJOR >= 1 + if (cmd->cmd_hdr.flags & VIRTIO_GPU_FLAG_INFO_RING_IDX) { + virgl_renderer_context_create_fence(cmd->cmd_hdr.ctx_id, + VIRGL_RENDERER_FENCE_FLAG_MERGEABLE, + cmd->cmd_hdr.ring_idx, + cmd->cmd_hdr.fence_id); + return; + } +#endif virgl_renderer_create_fence(cmd->cmd_hdr.fence_id, cmd->cmd_hdr.type); } @@ -991,6 +1000,11 @@ static void virgl_write_fence(void *opaque, uint32_t fence) * the guest can end up emitting fences out of order * so we should check all fenced cmds not just the first one. */ +#if VIRGL_VERSION_MAJOR >= 1 + if (cmd->cmd_hdr.flags & VIRTIO_GPU_FLAG_INFO_RING_IDX) { + continue; + } +#endif if (cmd->cmd_hdr.fence_id > fence) { continue; } @@ -1005,6 +1019,29 @@ static void virgl_write_fence(void *opaque, uint32_t fence) } } +#if VIRGL_VERSION_MAJOR >= 1 +static void virgl_write_context_fence(void *opaque, uint32_t ctx_id, + uint32_t ring_idx, uint64_t fence_id) { + VirtIOGPU *g = opaque; + struct virtio_gpu_ctrl_command *cmd, *tmp; + + QTAILQ_FOREACH_SAFE(cmd, &g->fenceq, next, tmp) { + if (cmd->cmd_hdr.flags & VIRTIO_GPU_FLAG_INFO_RING_IDX && + cmd->cmd_hdr.ctx_id == ctx_id && cmd->cmd_hdr.ring_idx == ring_idx && + cmd->cmd_hdr.fence_id <= fence_id) { + trace_virtio_gpu_fence_resp(cmd->cmd_hdr.fence_id); + virtio_gpu_ctrl_response_nodata(g, cmd, VIRTIO_GPU_RESP_OK_NODATA); + QTAILQ_REMOVE(&g->fenceq, cmd, next); + g_free(cmd); + g->inflight--; + if (virtio_gpu_stats_enabled(g->parent_obj.conf)) { + trace_virtio_gpu_dec_inflight_fences(g->inflight); + } + } + } +} +#endif + static virgl_renderer_gl_context virgl_create_context(void *opaque, int scanout_idx, struct virgl_renderer_gl_ctx_param *params) @@ -1039,11 +1076,18 @@ static int virgl_make_context_current(void *opaque, int scanout_idx, } static struct virgl_renderer_callbacks virtio_gpu_3d_cbs = { +#if VIRGL_VERSION_MAJOR >= 1 + .version = 3, +#else .version = 1, +#endif .write_fence = virgl_write_fence, .create_gl_context = virgl_create_context, .destroy_gl_context = virgl_destroy_context, .make_current = virgl_make_context_current, +#if VIRGL_VERSION_MAJOR >= 1 + .write_context_fence = virgl_write_context_fence, +#endif }; static void virtio_gpu_print_stats(void *opaque)