From patchwork Thu Nov 28 17:07:40 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Will Newton X-Patchwork-Id: 21847 Return-Path: X-Original-To: linaro@patches.linaro.org Delivered-To: linaro@patches.linaro.org Received: from mail-pb0-f72.google.com (mail-pb0-f72.google.com [209.85.160.72]) by ip-10-151-82-157.ec2.internal (Postfix) with ESMTPS id 97F5D20299 for ; Thu, 28 Nov 2013 17:07:44 +0000 (UTC) Received: by mail-pb0-f72.google.com with SMTP id jt11sf23085678pbb.11 for ; Thu, 28 Nov 2013 09:07:43 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:delivered-to:message-id:date:from:user-agent :mime-version:to:cc:subject:x-original-sender :x-original-authentication-results:precedence:mailing-list:list-id :list-post:list-help:list-archive:list-unsubscribe:content-type :content-transfer-encoding; bh=vOLCs+sWVq2CaqlzKjT63JIkl71dxhhJvs5VnQ120lw=; b=GZEpHSZqVoSvpO/9zSfMzAZ/GWV6iKEejuNIPscYY3mtuXOctCgC720eNXadQQ0dcp lkNl+OEXcdhObfveAl3DUuJHlFOKnWKKYU/6AF9WMhE0jnT34zmdeobDS/ts89TV77sb MeE9JDw+l/5FEQq53JZpV8h63WlW/jQ3/K/LRcVim/j4lwXf1Jwo94fuLEgGT6zwKczT yx75ywkVstzc70Rd9JWES9VZVdz/6Ewe014Fxyj1RWjyC2FxkcWamOR8UMYiUmu9XUjJ jIOcxnyWAQT8s2Td+HurHS4jsaO6btD/sLRVFHz0aqNf2HLvuU/11Crfizqz89vPRaSU WHLA== X-Gm-Message-State: ALoCoQm6fg6SWPzM/j9dpCNijXjKwQu8M6ADK5INCkL+IcQxkcONUJVKngip36Q+8ntXeG5qB7OL X-Received: by 10.67.2.41 with SMTP id bl9mr16882516pad.16.1385658463905; Thu, 28 Nov 2013 09:07:43 -0800 (PST) X-BeenThere: patchwork-forward@linaro.org Received: by 10.49.17.7 with SMTP id k7ls3419258qed.96.gmail; Thu, 28 Nov 2013 09:07:43 -0800 (PST) X-Received: by 10.58.233.98 with SMTP id tv2mr39503936vec.11.1385658463790; Thu, 28 Nov 2013 09:07:43 -0800 (PST) Received: from mail-ve0-f172.google.com (mail-ve0-f172.google.com [209.85.128.172]) by mx.google.com with ESMTPS id v5si23231844ves.42.2013.11.28.09.07.43 for (version=TLSv1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Thu, 28 Nov 2013 09:07:43 -0800 (PST) Received-SPF: neutral (google.com: 209.85.128.172 is neither permitted nor denied by best guess record for domain of patch+caf_=patchwork-forward=linaro.org@linaro.org) client-ip=209.85.128.172; Received: by mail-ve0-f172.google.com with SMTP id jw12so6406352veb.3 for ; Thu, 28 Nov 2013 09:07:43 -0800 (PST) X-Received: by 10.220.145.75 with SMTP id c11mr37449vcv.30.1385658463514; Thu, 28 Nov 2013 09:07:43 -0800 (PST) X-Forwarded-To: patchwork-forward@linaro.org X-Forwarded-For: patch@linaro.org patchwork-forward@linaro.org Delivered-To: patches@linaro.org Received: by 10.220.174.196 with SMTP id u4csp29439vcz; Thu, 28 Nov 2013 09:07:43 -0800 (PST) X-Received: by 10.15.52.197 with SMTP id p45mr401258eew.98.1385658462639; Thu, 28 Nov 2013 09:07:42 -0800 (PST) Received: from mail-ea0-f181.google.com (mail-ea0-f181.google.com [209.85.215.181]) by mx.google.com with ESMTPS id e2si8857627eeg.249.2013.11.28.09.07.42 for (version=TLSv1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Thu, 28 Nov 2013 09:07:42 -0800 (PST) Received-SPF: neutral (google.com: 209.85.215.181 is neither permitted nor denied by best guess record for domain of will.newton@linaro.org) client-ip=209.85.215.181; Received: by mail-ea0-f181.google.com with SMTP id m10so6017662eaj.40 for ; Thu, 28 Nov 2013 09:07:42 -0800 (PST) X-Received: by 10.15.56.7 with SMTP id x7mr6420818eew.43.1385658461954; Thu, 28 Nov 2013 09:07:41 -0800 (PST) Received: from localhost.localdomain (cpc6-seac21-2-0-cust453.7-2.cable.virginm.net. [82.1.113.198]) by mx.google.com with ESMTPSA id g1sm31799136eew.1.2013.11.28.09.07.40 for (version=TLSv1 cipher=RC4-SHA bits=128/128); Thu, 28 Nov 2013 09:07:41 -0800 (PST) Message-ID: <5297785C.5030509@linaro.org> Date: Thu, 28 Nov 2013 17:07:40 +0000 From: Will Newton User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:24.0) Gecko/20100101 Thunderbird/24.0 MIME-Version: 1.0 To: qemu-devel@nongnu.org CC: Patch Tracking Subject: [PATCH v6 4/4] target-arm: Implement ARMv8 SIMD VMAXNM and VMINNM instructions. X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: will.newton@linaro.org X-Original-Authentication-Results: mx.google.com; spf=neutral (google.com: 209.85.128.172 is neither permitted nor denied by best guess record for domain of patch+caf_=patchwork-forward=linaro.org@linaro.org) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Precedence: list Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org List-ID: X-Google-Group-Id: 836684582541 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , This adds support for the ARMv8 Advanced SIMD VMAXNM and VMINNM instructions. Signed-off-by: Will Newton --- target-arm/helper.h | 3 +++ target-arm/neon_helper.c | 24 ++++++++++++++++++++++++ target-arm/translate.c | 23 +++++++++++++++++------ 3 files changed, 44 insertions(+), 6 deletions(-) diff --git a/target-arm/helper.h b/target-arm/helper.h index d459a39..3ecbbd2 100644 --- a/target-arm/helper.h +++ b/target-arm/helper.h @@ -355,6 +355,9 @@ DEF_HELPER_3(neon_cgt_f32, i32, i32, i32, ptr) DEF_HELPER_3(neon_acge_f32, i32, i32, i32, ptr) DEF_HELPER_3(neon_acgt_f32, i32, i32, i32, ptr) +DEF_HELPER_3(neon_maxnm_f32, i32, i32, i32, ptr) +DEF_HELPER_3(neon_minnm_f32, i32, i32, i32, ptr) + /* iwmmxt_helper.c */ DEF_HELPER_2(iwmmxt_maddsq, i64, i64, i64) DEF_HELPER_2(iwmmxt_madduq, i64, i64, i64) diff --git a/target-arm/neon_helper.c b/target-arm/neon_helper.c index b028cc2..cc55e83 100644 --- a/target-arm/neon_helper.c +++ b/target-arm/neon_helper.c @@ -2008,3 +2008,27 @@ void HELPER(neon_zip16)(CPUARMState *env, uint32_t rd, uint32_t rm) env->vfp.regs[rm] = make_float64(m0); env->vfp.regs[rd] = make_float64(d0); } + +uint32_t HELPER(neon_maxnm_f32)(uint32_t a, uint32_t b, void *fpstp) +{ + float_status *fpst = fpstp; + float32 af = make_float32(a); + float32 bf = make_float32(b); + if (float32_is_quiet_nan(af) && !float32_is_quiet_nan(bf)) + return b; + else if (float32_is_quiet_nan(bf) && !float32_is_quiet_nan(af)) + return a; + return float32_val(float32_max(af, bf, fpst)); +} + +uint32_t HELPER(neon_minnm_f32)(uint32_t a, uint32_t b, void *fpstp) +{ + float_status *fpst = fpstp; + float32 af = make_float32(a); + float32 bf = make_float32(b); + if (float32_is_quiet_nan(af) && !float32_is_quiet_nan(bf)) + return b; + else if (float32_is_quiet_nan(bf) && !float32_is_quiet_nan(af)) + return a; + return float32_val(float32_min(af, bf, fpst)); +} diff --git a/target-arm/translate.c b/target-arm/translate.c index cac7668..9a4e7f4 100644 --- a/target-arm/translate.c +++ b/target-arm/translate.c @@ -4540,7 +4540,7 @@ static void gen_neon_narrow_op(int op, int u, int size, #define NEON_3R_FLOAT_CMP 28 /* float VCEQ, VCGE, VCGT */ #define NEON_3R_FLOAT_ACMP 29 /* float VACGE, VACGT, VACLE, VACLT */ #define NEON_3R_FLOAT_MINMAX 30 /* float VMIN, VMAX */ -#define NEON_3R_VRECPS_VRSQRTS 31 /* float VRECPS, VRSQRTS */ +#define NEON_3R_VRECPS_VRSQRTS 31 /* float VRECPS, VRSQRTS, VMAXNM/MINNM */ static const uint8_t neon_3r_sizes[] = { [NEON_3R_VHADD] = 0x7, @@ -4835,7 +4835,8 @@ static int disas_neon_data_insn(CPUARMState * env, DisasContext *s, uint32_t ins } break; case NEON_3R_VRECPS_VRSQRTS: - if (u) { + /* Encoding shared with VMAXNM/VMINNM in ARMv8 */ + if (u && (!arm_feature(env, ARM_FEATURE_V8) || (size & 1))) { return 1; } break; @@ -5125,10 +5126,20 @@ static int disas_neon_data_insn(CPUARMState * env, DisasContext *s, uint32_t ins break; } case NEON_3R_VRECPS_VRSQRTS: - if (size == 0) - gen_helper_recps_f32(tmp, tmp, tmp2, cpu_env); - else - gen_helper_rsqrts_f32(tmp, tmp, tmp2, cpu_env); + if (u) { + /* VMAXNM/VMINNM */ + TCGv_ptr fpstatus = get_fpstatus_ptr(1); + if (size == 0) + gen_helper_neon_maxnm_f32(tmp, tmp, tmp2, fpstatus); + else + gen_helper_neon_minnm_f32(tmp, tmp, tmp2, fpstatus); + tcg_temp_free_ptr(fpstatus); + } else { + if (size == 0) + gen_helper_recps_f32(tmp, tmp, tmp2, cpu_env); + else + gen_helper_rsqrts_f32(tmp, tmp, tmp2, cpu_env); + } break; case NEON_3R_VFM: {