From patchwork Tue Jun 30 10:48:49 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Shannon Zhao X-Patchwork-Id: 50449 Return-Path: X-Original-To: linaro@patches.linaro.org Delivered-To: linaro@patches.linaro.org Received: from mail-la0-f71.google.com (mail-la0-f71.google.com [209.85.215.71]) by ip-10-151-82-157.ec2.internal (Postfix) with ESMTPS id 0BC69229DF for ; Tue, 30 Jun 2015 10:49:56 +0000 (UTC) Received: by laar3 with SMTP id r3sf2308465laa.1 for ; Tue, 30 Jun 2015 03:49:55 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:mime-version:delivered-to:from:to:cc:subject :date:message-id:in-reply-to:references:sender:precedence:list-id :x-original-sender:x-original-authentication-results:mailing-list :list-post:list-help:list-archive:list-unsubscribe; bh=yVOPmjqi+AHLv1foOYQPi7H4CSMPVemLcvX15jKngX8=; b=YRBIzinWCKBmkx/D4PIGaCDc7VqYPAabU/J9izQ17TmQO+qc7+AaLeYT/J7PCLtnQl AxfZbUv/4jxoidgYZubSL4qSNDA+UnUlRa+2zndZmpSwErBcSmrgN9/jRmgz/juU+sYD Ai1cYsSDrRaBfWFGh9xUK7cHkW1V8S6VSfJ/s2kxu6WhxB+12B36XKAzDgyEvBwKoYdk KTcvOhOgTbaEJ4b3o5xwPSz3TDQFwHpP7Pf37SpZLOp+3vONhA92QFQjYwBrBv8clU+M WfJhqYDSEMK5SbhGOxDYGSJGL4CZVWtnfVk4/zp7TCgsYhzhFFkUH1L1B+/EV9NJMk9O us6A== X-Gm-Message-State: ALoCoQmdl4PJuhuaRB5BxXIsFYRW/jnrwYbfwsFvmGvMa2sOgaoIl/8UGgLti+GOM+3SH9TPyx5O X-Received: by 10.112.40.45 with SMTP id u13mr13730510lbk.0.1435661395029; Tue, 30 Jun 2015 03:49:55 -0700 (PDT) MIME-Version: 1.0 X-BeenThere: patchwork-forward@linaro.org Received: by 10.152.29.7 with SMTP id f7ls23742lah.48.gmail; Tue, 30 Jun 2015 03:49:54 -0700 (PDT) X-Received: by 10.152.27.74 with SMTP id r10mr19275358lag.31.1435661394742; Tue, 30 Jun 2015 03:49:54 -0700 (PDT) Received: from mail-la0-f41.google.com (mail-la0-f41.google.com. [209.85.215.41]) by mx.google.com with ESMTPS id lc7si37760163lac.115.2015.06.30.03.49.54 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 30 Jun 2015 03:49:54 -0700 (PDT) Received-SPF: pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.215.41 as permitted sender) client-ip=209.85.215.41; Received: by lagc2 with SMTP id c2so8060240lag.3 for ; Tue, 30 Jun 2015 03:49:54 -0700 (PDT) X-Received: by 10.152.36.102 with SMTP id p6mr18951490laj.19.1435661394622; Tue, 30 Jun 2015 03:49:54 -0700 (PDT) X-Forwarded-To: patchwork-forward@linaro.org X-Forwarded-For: patch@linaro.org patchwork-forward@linaro.org Delivered-To: patch@linaro.org Received: by 10.112.108.230 with SMTP id hn6csp2352378lbb; Tue, 30 Jun 2015 03:49:53 -0700 (PDT) X-Received: by 10.68.93.196 with SMTP id cw4mr42415232pbb.36.1435661392570; Tue, 30 Jun 2015 03:49:52 -0700 (PDT) Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id y5si66313267par.87.2015.06.30.03.49.51; Tue, 30 Jun 2015 03:49:52 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of stable-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751398AbbF3Ktv (ORCPT + 2 others); Tue, 30 Jun 2015 06:49:51 -0400 Received: from mail-pd0-f170.google.com ([209.85.192.170]:35459 "EHLO mail-pd0-f170.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752426AbbF3Ktu (ORCPT ); Tue, 30 Jun 2015 06:49:50 -0400 Received: by pdbci14 with SMTP id ci14so4255741pdb.2 for ; Tue, 30 Jun 2015 03:49:49 -0700 (PDT) X-Received: by 10.70.108.137 with SMTP id hk9mr42276625pdb.105.1435661389573; Tue, 30 Jun 2015 03:49:49 -0700 (PDT) Received: from localhost ([120.136.36.232]) by mx.google.com with ESMTPSA id ec5sm7094228pbc.67.2015.06.30.03.49.47 (version=TLSv1 cipher=RC4-SHA bits=128/128); Tue, 30 Jun 2015 03:49:48 -0700 (PDT) From: shannon.zhao@linaro.org To: stable@vger.kernel.org Cc: gregkh@linuxfoundation.org, christoffer.dall@linaro.org, shannon.zhao@linaro.org, Ard Biesheuvel , Marc Zyngier Subject: [PATCH for 3.14.y stable 01/22] ARM/arm64: KVM: fix use of WnR bit in kvm_is_write_fault() Date: Tue, 30 Jun 2015 18:48:49 +0800 Message-Id: <1435661350-8060-2-git-send-email-shannon.zhao@linaro.org> X-Mailer: git-send-email 1.9.5.msysgit.1 In-Reply-To: <1435661350-8060-1-git-send-email-shannon.zhao@linaro.org> References: <1435661350-8060-1-git-send-email-shannon.zhao@linaro.org> Sender: stable-owner@vger.kernel.org Precedence: list List-ID: X-Mailing-List: stable@vger.kernel.org X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: shannon.zhao@linaro.org X-Original-Authentication-Results: mx.google.com; spf=pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.215.41 as permitted sender) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org X-Google-Group-Id: 836684582541 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , From: Ard Biesheuvel Since we don't backport commit 9804788 (arm/arm64: KVM: Support KVM_CAP_READONLY_MEM), ingore the changes in kvm_handle_guest_abort introduced by this patch. commit a7d079cea2dffb112e26da2566dd84c0ef1fce97 upstream. The ISS encoding for an exception from a Data Abort has a WnR bit[6] that indicates whether the Data Abort was caused by a read or a write instruction. While there are several fields in the encoding that are only valid if the ISV bit[24] is set, WnR is not one of them, so we can read it unconditionally. Instead of fixing both implementations of kvm_is_write_fault() in place, reimplement it just once using kvm_vcpu_dabt_iswrite(), which already does the right thing with respect to the WnR bit. Also fix up the callers to pass 'vcpu' Acked-by: Laszlo Ersek Acked-by: Marc Zyngier Acked-by: Christoffer Dall Signed-off-by: Ard Biesheuvel Signed-off-by: Marc Zyngier Signed-off-by: Shannon Zhao --- arch/arm/include/asm/kvm_mmu.h | 11 ----------- arch/arm/kvm/mmu.c | 10 +++++++++- arch/arm64/include/asm/kvm_mmu.h | 13 ------------- 3 files changed, 9 insertions(+), 25 deletions(-) diff --git a/arch/arm/include/asm/kvm_mmu.h b/arch/arm/include/asm/kvm_mmu.h index 0cbdb8e..630869e 100644 --- a/arch/arm/include/asm/kvm_mmu.h +++ b/arch/arm/include/asm/kvm_mmu.h @@ -78,17 +78,6 @@ static inline void kvm_set_pte(pte_t *pte, pte_t new_pte) flush_pmd_entry(pte); } -static inline bool kvm_is_write_fault(unsigned long hsr) -{ - unsigned long hsr_ec = hsr >> HSR_EC_SHIFT; - if (hsr_ec == HSR_EC_IABT) - return false; - else if ((hsr & HSR_ISV) && !(hsr & HSR_WNR)) - return false; - else - return true; -} - static inline void kvm_clean_pgd(pgd_t *pgd) { clean_dcache_area(pgd, PTRS_PER_S2_PGD * sizeof(pgd_t)); diff --git a/arch/arm/kvm/mmu.c b/arch/arm/kvm/mmu.c index 70ed2c1..049c56e 100644 --- a/arch/arm/kvm/mmu.c +++ b/arch/arm/kvm/mmu.c @@ -746,6 +746,14 @@ static bool transparent_hugepage_adjust(pfn_t *pfnp, phys_addr_t *ipap) return false; } +static bool kvm_is_write_fault(struct kvm_vcpu *vcpu) +{ + if (kvm_vcpu_trap_is_iabt(vcpu)) + return false; + + return kvm_vcpu_dabt_iswrite(vcpu); +} + static int user_mem_abort(struct kvm_vcpu *vcpu, phys_addr_t fault_ipa, struct kvm_memory_slot *memslot, unsigned long fault_status) @@ -761,7 +769,7 @@ static int user_mem_abort(struct kvm_vcpu *vcpu, phys_addr_t fault_ipa, pfn_t pfn; pgprot_t mem_type = PAGE_S2; - write_fault = kvm_is_write_fault(kvm_vcpu_get_hsr(vcpu)); + write_fault = kvm_is_write_fault(vcpu); if (fault_status == FSC_PERM && !write_fault) { kvm_err("Unexpected L2 read permission error\n"); return -EFAULT; diff --git a/arch/arm64/include/asm/kvm_mmu.h b/arch/arm64/include/asm/kvm_mmu.h index 8e138c7..737da74 100644 --- a/arch/arm64/include/asm/kvm_mmu.h +++ b/arch/arm64/include/asm/kvm_mmu.h @@ -93,19 +93,6 @@ void kvm_clear_hyp_idmap(void); #define kvm_set_pte(ptep, pte) set_pte(ptep, pte) #define kvm_set_pmd(pmdp, pmd) set_pmd(pmdp, pmd) -static inline bool kvm_is_write_fault(unsigned long esr) -{ - unsigned long esr_ec = esr >> ESR_EL2_EC_SHIFT; - - if (esr_ec == ESR_EL2_EC_IABT) - return false; - - if ((esr & ESR_EL2_ISV) && !(esr & ESR_EL2_WNR)) - return false; - - return true; -} - static inline void kvm_clean_pgd(pgd_t *pgd) {} static inline void kvm_clean_pmd_entry(pmd_t *pmd) {} static inline void kvm_clean_pte(pte_t *pte) {}