[PULL,v2,6/6] arm: KVM: Allow unaligned accesses at HYP

Message ID	20170607171152.21874-7-cdall@linaro.org
State	Accepted
Commit	33b5c38852b29736f3b472dd095c9a18ec22746f
Headers	show Delivered-To: patch@linaro.org Received-SPF: pass (google.com: best guess record for domain of stable-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; From: Christoffer Dall <cdall@linaro.org> To: Paolo Bonzini <pbonzini@redhat.com>, =?utf-8?b?UmFkaW0gS3LEjW3DocWZ?= <rkrcmar@redhat.com> Cc: Marc Zyngier <marc.zyngier@arm.com>, kvmarm@lists.cs.columbia.edu, kvm@vger.kernel.org, linux-arm-kernel@lists.infradead.org, stable@vger.kernel.org, Christoffer Dall <cdall@linaro.org> Subject: [PULL v2 6/6] arm: KVM: Allow unaligned accesses at HYP Date: Wed, 7 Jun 2017 19:11:52 +0200 Message-Id: <20170607171152.21874-7-cdall@linaro.org> In-Reply-To: <20170607171152.21874-1-cdall@linaro.org> References: <20170607171152.21874-1-cdall@linaro.org> Sender: stable-owner@vger.kernel.org Precedence: bulk
Series	None \| expand [PULL,v2,3/6] KVM: arm/arm64: Handle possible NULL stage2 pud when ageing pages [PULL,v2,4/6] arm64: KVM: Preserve RES1 bits in SCTLR_EL2 [PULL,v2,5/6] arm64: KVM: Allow unaligned accesses at EL2 [PULL,v2,6/6] arm: KVM: Allow unaligned accesses at HYP

Message ID

20170607171152.21874-7-cdall@linaro.org

State

Accepted

Commit

33b5c38852b29736f3b472dd095c9a18ec22746f

Headers

Received-SPF: pass (google.com: best guess record for domain of
	stable-owner@vger.kernel.org designates 209.132.180.67 as
	permitted sender) client-ip=209.132.180.67; 
From: Christoffer Dall <cdall@linaro.org>
To: Paolo Bonzini <pbonzini@redhat.com>, =?utf-8?b?UmFkaW0gS3LEjW3DocWZ?=
	<rkrcmar@redhat.com>
Cc: Marc Zyngier <marc.zyngier@arm.com>, kvmarm@lists.cs.columbia.edu,
	kvm@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
	stable@vger.kernel.org, Christoffer Dall <cdall@linaro.org>
Subject: [PULL v2 6/6] arm: KVM: Allow unaligned accesses at HYP
Date: Wed,  7 Jun 2017 19:11:52 +0200
Message-Id: <20170607171152.21874-7-cdall@linaro.org>
In-Reply-To: <20170607171152.21874-1-cdall@linaro.org>
References: <20170607171152.21874-1-cdall@linaro.org>
Sender: stable-owner@vger.kernel.org
Precedence: bulk

Series

None | expand

Commit Message

Christoffer Dall June 7, 2017, 5:11 p.m. UTC

From: Marc Zyngier <marc.zyngier@arm.com>

We currently have the HSCTLR.A bit set, trapping unaligned accesses
at HYP, but we're not really prepared to deal with it.

Since the rest of the kernel is pretty happy about that, let's follow
its example and set HSCTLR.A to zero. Modern CPUs don't really care.

Cc: stable@vger.kernel.org
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>

Signed-off-by: Christoffer Dall <cdall@linaro.org>

---
 arch/arm/kvm/init.S | 5 ++---
 1 file changed, 2 insertions(+), 3 deletions(-)

-- 
2.9.0

diff --git a/arch/arm/kvm/init.S b/arch/arm/kvm/init.S
index 570ed4a..5386528 100644
--- a/arch/arm/kvm/init.S
+++ b/arch/arm/kvm/init.S
@@ -104,7 +104,6 @@  __do_hyp_init:
 	@  - Write permission implies XN: disabled
 	@  - Instruction cache: enabled
 	@  - Data/Unified cache: enabled
-	@  - Memory alignment checks: enabled
 	@  - MMU: enabled (this code must be run from an identity mapping)
 	mrc	p15, 4, r0, c1, c0, 0	@ HSCR
 	ldr	r2, =HSCTLR_MASK
@@ -112,8 +111,8 @@  __do_hyp_init:
 	mrc	p15, 0, r1, c1, c0, 0	@ SCTLR
 	ldr	r2, =(HSCTLR_EE | HSCTLR_FI | HSCTLR_I | HSCTLR_C)
 	and	r1, r1, r2
- ARM(	ldr	r2, =(HSCTLR_M | HSCTLR_A)			)
- THUMB(	ldr	r2, =(HSCTLR_M | HSCTLR_A | HSCTLR_TE)		)
+ ARM(	ldr	r2, =(HSCTLR_M)					)
+ THUMB(	ldr	r2, =(HSCTLR_M | HSCTLR_TE)			)
 	orr	r1, r1, r2
 	orr	r0, r0, r1
 	mcr	p15, 4, r0, c1, c0, 0	@ HSCR

[PULL,v2,6/6] arm: KVM: Allow unaligned accesses at HYP

Commit Message

Patch