From patchwork Tue Dec 12 12:50:32 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Christoffer Dall X-Patchwork-Id: 121519 Delivered-To: patch@linaro.org Received: by 10.140.22.227 with SMTP id 90csp4143795qgn; Tue, 12 Dec 2017 05:49:59 -0800 (PST) X-Google-Smtp-Source: ACJfBotQiSugoMCaAxQTQtGB6hHIG5jhNEAlZNjKp4M0zCEMqg4qxobmhFKD4mOExvcRA4b+9dcz X-Received: by 10.101.78.138 with SMTP id b10mr2104341pgs.36.1513086599363; Tue, 12 Dec 2017 05:49:59 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1513086599; cv=none; d=google.com; s=arc-20160816; b=bo2J8ImMtSIFVav59DMCqBi7SkVXctj6oMwHABOtUmnKTHe6OI+9Jx53+eK/AHeSrb LqQHh+2gpqjJYIIynYNlvPtY01Iv1XrWdQRrZCPZj+dlryPidIyWdl9l3GivTpjPFoYW cmZzNR8Bh63IQ5yRk4G+5uRpVOyudICWGYdF8FZOb1pS6NPlV8j/U9CSau9q5742DOJx PXh0LDAKAKv+Z45Ijqp63fESMf6c0LslmQgfGULwCE502Df+ajyqXZEJ/MwMDWKTnJp5 1qwowRsNFeq+roCRH871bf2kkt9HbstL4WWMLlZdsiHi/ADQiaT8yJTCZq/arva47nd3 yCzg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:message-id:date:subject:cc:to:from :dkim-signature:arc-authentication-results; bh=N3b2eBaM6eDYk0yNvu/o6y+UWFJEBMFcTkTgL75s+uU=; b=1Km8o9YOqxc1xIecuq2v5j/g+Y69Rnhk24EdMOjj7WhgGA/W9bXG2LI6uJ1beq40Xd 5x7vJN8tpZThWbUqnnfbqIjGTvunh5M4GdY7ciLsDlqYkOq28Re88f8TRnC22GmBNvgq dtA9jrUaODn/ilhgz5vBADbxPl0XntNBfXHFu3w9kGYPpG9E5EzuAE/mp0U4BGfy/EZj +/lbPRf2zSRcipmahCmB3obosjp5LyMeK7hLEd7WQg2zhTmep+YlfatGSQLlvX2EDCOm pxhi8zARhOYASHksVbR83vn3HQKoTNLjUz3OvBbIC95gZTaotgmcJZAJwgtq+7+M0sCI xg1A== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=cP+SpYNz; spf=pass (google.com: best guess record for domain of stable-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=stable-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id 31si11845342plk.90.2017.12.12.05.49.59; Tue, 12 Dec 2017 05:49:59 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of stable-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=cP+SpYNz; spf=pass (google.com: best guess record for domain of stable-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=stable-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753797AbdLLNto (ORCPT + 10 others); Tue, 12 Dec 2017 08:49:44 -0500 Received: from mail-wm0-f66.google.com ([74.125.82.66]:44847 "EHLO mail-wm0-f66.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753715AbdLLMuo (ORCPT ); Tue, 12 Dec 2017 07:50:44 -0500 Received: by mail-wm0-f66.google.com with SMTP id t8so20431517wmc.3 for ; Tue, 12 Dec 2017 04:50:43 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id; bh=N3b2eBaM6eDYk0yNvu/o6y+UWFJEBMFcTkTgL75s+uU=; b=cP+SpYNzzIGgnpkM79B0ZL9T6nbcQWNHw5BBEAANV8EIQW4IEYcvln0hqAYVlpcZrQ Te23SyHYyvWlaq0CDiwFWQGQpzHnxikIo2I9LAjc9zevCUo5ugm3XnQxEm+Hr4jOkVVi JcCEoBfNCY5azdG5n+35cZ2AuwKdFP2qypUgs= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id; bh=N3b2eBaM6eDYk0yNvu/o6y+UWFJEBMFcTkTgL75s+uU=; b=W5lQa5srjJa7/QnD0Z92y3qcjHTwHIvT4mH+Jq1+3jhIyQwf8U1PP7czZkg+UTEfeY xg/XhDW2E/pVrFTlXsS3catvQsFt+pxhW7kZ2fpcpPX+Zm4kyWfxyOpjCcbrgBsrRWxU iZjRzNKpOVt3CknG8WdWMrSb6nujR5ZFzpAQsVp9XxWS5SJuMzs9XhN0RdZH/IDZq+3l CJCA4T9RWoz+iclJecy31gyXTgUijob7GE2p2QYAacqBV+r4CoxOBJ+BIhfWu6tqjWW8 dvxlsNIWlYzf6DJoOLp9gvaKuPHACM71ULn3p3cJxx+dOMBEmY4JM+lBvwJung6ZfYRL I/6Q== X-Gm-Message-State: AKGB3mJta4icnWZVz1kcaXmoZVHT0wxMxmGKks9cLPwZ062cYh+vcqN1 54/ntOdekLP+M2nt15OZK8O9qzfvnD8= X-Received: by 10.80.137.195 with SMTP id h3mr2681127edh.295.1513083042710; Tue, 12 Dec 2017 04:50:42 -0800 (PST) Received: from localhost.localdomain (x50d2404e.cust.hiper.dk. [80.210.64.78]) by smtp.gmail.com with ESMTPSA id o15sm7553677edk.25.2017.12.12.04.50.41 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Tue, 12 Dec 2017 04:50:41 -0800 (PST) From: Christoffer Dall To: Cc: Marc Zyngier , gregkh@linuxfoundation.org, Kristina Martsenko , Christoffer Dall Subject: [PATCH v4.4 backport] arm64: KVM: fix VTTBR_BADDR_MASK BUG_ON off-by-one Date: Tue, 12 Dec 2017 13:50:32 +0100 Message-Id: <20171212125032.6292-2-christoffer.dall@linaro.org> X-Mailer: git-send-email 2.14.2 Sender: stable-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: stable@vger.kernel.org From: Kristina Martsenko Commit 26aa7b3b1c0fb3f1a6176a0c1847204ef4355693 upstream. VTTBR_BADDR_MASK is used to sanity check the size and alignment of the VTTBR address. It seems to currently be off by one, thereby only allowing up to 47-bit addresses (instead of 48-bit) and also insufficiently checking the alignment. This patch fixes it. As an example, with 4k pages, before this patch we have: PHYS_MASK_SHIFT = 48 VTTBR_X = 37 - 24 = 13 VTTBR_BADDR_SHIFT = 13 - 1 = 12 VTTBR_BADDR_MASK = ((1 << 35) - 1) << 12 = 0x00007ffffffff000 Which is wrong, because the mask doesn't allow bit 47 of the VTTBR address to be set, and only requires the address to be 12-bit (4k) aligned, while it actually needs to be 13-bit (8k) aligned because we concatenate two 4k tables. With this patch, the mask becomes 0x0000ffffffffe000, which is what we want. Fixes: 0369f6a34b9f ("arm64: KVM: EL2 register definitions") Cc: # 3.11.x Reviewed-by: Suzuki K Poulose Reviewed-by: Christoffer Dall Signed-off-by: Kristina Martsenko Signed-off-by: Marc Zyngier Signed-off-by: Christoffer Dall --- arch/arm64/include/asm/kvm_arm.h | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) -- 2.14.2 diff --git a/arch/arm64/include/asm/kvm_arm.h b/arch/arm64/include/asm/kvm_arm.h index 2d960f8588b0..ef8e13d379cb 100644 --- a/arch/arm64/include/asm/kvm_arm.h +++ b/arch/arm64/include/asm/kvm_arm.h @@ -164,8 +164,7 @@ #define VTTBR_X (37 - VTCR_EL2_T0SZ_40B) #endif -#define VTTBR_BADDR_SHIFT (VTTBR_X - 1) -#define VTTBR_BADDR_MASK (((UL(1) << (PHYS_MASK_SHIFT - VTTBR_X)) - 1) << VTTBR_BADDR_SHIFT) +#define VTTBR_BADDR_MASK (((UL(1) << (PHYS_MASK_SHIFT - VTTBR_X)) - 1) << VTTBR_X) #define VTTBR_VMID_SHIFT (UL(48)) #define VTTBR_VMID_MASK (UL(0xFF) << VTTBR_VMID_SHIFT)