From patchwork Mon Nov 4 21:43:39 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Greg KH X-Patchwork-Id: 178473 Delivered-To: patch@linaro.org Received: by 2002:a92:38d5:0:0:0:0:0 with SMTP id g82csp2083270ilf; Mon, 4 Nov 2019 14:12:06 -0800 (PST) X-Google-Smtp-Source: APXvYqwsnQfKTNLm+gVtbly+7JSKwJnqUnT9GT+QpMdz8zNQe+i8LvBqDV2cf2m8ftOzO7jo+kkn X-Received: by 2002:a05:6402:6cc:: with SMTP id n12mr32954394edy.38.1572905105333; Mon, 04 Nov 2019 14:05:05 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1572905105; cv=none; d=google.com; s=arc-20160816; b=zeEDB6rqpZieowgEaXUfgfHMwwSvpM6W4JAKYBoH5epcGoChVrV4skoJYffeTDCpE9 vh60Fxymudp7gglsbdm17DOybLgQ1+c2AoWMx4I26EHbYa1Fhz9vuRHVa6utV5mkysga njGkvDBnzdw2b28lEZl/hMj+GtjpVLaq3vnTLGRDfDTwcNnk5yZ21j9HC4lH/4zePDzW reeMZ34dSOd/Vdz0XhoWOpIWLnOdsZdAfTcIjCwQEbhfvZOxIguhtBtBcSBgL4p1dJWh BTJlu1rzXjFFMLn6WDFZqhC4JpYlzyAeaIfQu1n82gTeFTCX35trsL82kRce096QgynA yZaw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :user-agent:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=wy4B1kJWmcnJJFNM06v83c39FlmZ0Ff3rmHHggFiTIY=; b=oBvUMTgB0pkkewcrt8EJgcTsRlq8D5sX5TaTktYIVqX7I+KhpiWOeNwgZZhj9jbfIa emJtjRnSzGMWGxw2Uwp+Bf+MFhb7yi5COfOmiK4oIdKV86WaYWVL9kHxK7dpDwHXe4wI GpclB2Sd2yGwKR44+tWekv8srDgOFtSPJikmd97O9K+/Pkp2V0FmtH8ZM4eQZHCiBagG l0LVnKiEPqY/ckzLZpjwFEuDE2bYyptCcwJyqzxFsbaT/ROtVkMpOrpAtd5smdILFyfZ HLRt/fygavK+HfsloEFNxliVAxQnjXMBgv0oz+WGi4Iy6T3xP/oLgbz0AWui/UqO0AEy 6tmA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@kernel.org header.s=default header.b=fJgTmrPE; spf=pass (google.com: best guess record for domain of stable-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=stable-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id h7si11845702ejp.203.2019.11.04.14.05.04; Mon, 04 Nov 2019 14:05:05 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of stable-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@kernel.org header.s=default header.b=fJgTmrPE; spf=pass (google.com: best guess record for domain of stable-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=stable-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2389771AbfKDWFD (ORCPT + 14 others); Mon, 4 Nov 2019 17:05:03 -0500 Received: from mail.kernel.org ([198.145.29.99]:36096 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2389115AbfKDWFD (ORCPT ); Mon, 4 Nov 2019 17:05:03 -0500 Received: from localhost (6.204-14-84.ripe.coltfrance.com [84.14.204.6]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id B2AD5205C9; Mon, 4 Nov 2019 22:05:01 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1572905102; bh=7mNEQb4odMCK8DC3X0ofHK/HaZhcSp9aEhBH5SILLYY=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=fJgTmrPEwJToifcNIBFLXu9vgIcD/wgHjiB4DD/oQzc6mbAghlkF/OeLou3GFRsLT BMTcjLztcncPgaBFjqWpKxY4t32U1rHIlRVWDxjmoY6A6UEfqmi4OLSvbQgcQ95nkO LQ0sQHP6UBgTw7mhcl/p6agILb3/tJrYugoGcGU4= From: Greg Kroah-Hartman To: linux-kernel@vger.kernel.org Cc: Greg Kroah-Hartman , stable@vger.kernel.org, Julien Grall , mark.brown@arm.com, Will Deacon , Sasha Levin Subject: [PATCH 5.3 029/163] arm64: cpufeature: Effectively expose FRINT capability to userspace Date: Mon, 4 Nov 2019 22:43:39 +0100 Message-Id: <20191104212142.418176586@linuxfoundation.org> X-Mailer: git-send-email 2.23.0 In-Reply-To: <20191104212140.046021995@linuxfoundation.org> References: <20191104212140.046021995@linuxfoundation.org> User-Agent: quilt/0.66 MIME-Version: 1.0 Sender: stable-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: stable@vger.kernel.org From: Julien Grall [ Upstream commit 7230f7e99fecc684180322b056fad3853d1029d3 ] The HWCAP framework will detect a new capability based on the sanitized version of the ID registers. Sanitization is based on a whitelist, so any field not described will end up to be zeroed. At the moment, ID_AA64ISAR1_EL1.FRINTTS is not described in ftr_id_aa64isar1. This means the field will be zeroed and therefore the userspace will not be able to see the HWCAP even if the hardware supports the feature. This can be fixed by describing the field in ftr_id_aa64isar1. Fixes: ca9503fc9e98 ("arm64: Expose FRINT capabilities to userspace") Signed-off-by: Julien Grall Cc: mark.brown@arm.com Signed-off-by: Will Deacon Signed-off-by: Sasha Levin --- arch/arm64/kernel/cpufeature.c | 1 + 1 file changed, 1 insertion(+) -- 2.20.1 diff --git a/arch/arm64/kernel/cpufeature.c b/arch/arm64/kernel/cpufeature.c index 9323bcc40a58a..cabebf1a79768 100644 --- a/arch/arm64/kernel/cpufeature.c +++ b/arch/arm64/kernel/cpufeature.c @@ -136,6 +136,7 @@ static const struct arm64_ftr_bits ftr_id_aa64isar0[] = { static const struct arm64_ftr_bits ftr_id_aa64isar1[] = { ARM64_FTR_BITS(FTR_VISIBLE, FTR_STRICT, FTR_LOWER_SAFE, ID_AA64ISAR1_SB_SHIFT, 4, 0), + ARM64_FTR_BITS(FTR_VISIBLE, FTR_STRICT, FTR_LOWER_SAFE, ID_AA64ISAR1_FRINTTS_SHIFT, 4, 0), ARM64_FTR_BITS(FTR_VISIBLE_IF_IS_ENABLED(CONFIG_ARM64_PTR_AUTH), FTR_STRICT, FTR_LOWER_SAFE, ID_AA64ISAR1_GPI_SHIFT, 4, 0), ARM64_FTR_BITS(FTR_VISIBLE_IF_IS_ENABLED(CONFIG_ARM64_PTR_AUTH),