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[203.254.224.24]) by mx.google.com with ESMTP id vh4si37575459pbc.143.2012.07.05.04.55.25; Thu, 05 Jul 2012 04:55:25 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of rajeshwari.s@samsung.com designates 203.254.224.24 as permitted sender) client-ip=203.254.224.24; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of rajeshwari.s@samsung.com designates 203.254.224.24 as permitted sender) smtp.mail=rajeshwari.s@samsung.com Received: from epcpsbgm1.samsung.com (mailout1.samsung.com [203.254.224.24]) by mailout1.samsung.com (Oracle Communications Messaging Server 7u4-24.01(7.0.4.24.0) 64bit (built Nov 17 2011)) with ESMTP id <0M6O001P2RS24K40@mailout1.samsung.com>; Thu, 05 Jul 2012 20:55:24 +0900 (KST) X-AuditID: cbfee61a-b7f616d000004b7e-c9-4ff580ac0832 Received: from epmmp2 ( [203.254.227.17]) by epcpsbgm1.samsung.com (EPCPMTA) with SMTP id 68.58.19326.CA085FF4; Thu, 05 Jul 2012 20:55:24 +0900 (KST) Received: from rajeshwari-linux.sisodomain.com ([107.108.215.115]) by mmp2.samsung.com (Oracle Communications Messaging Server 7u4-24.01(7.0.4.24.0) 64bit (built Nov 17 2011)) with ESMTPA id <0M6O00E8SRRY5M50@mmp2.samsung.com>; Thu, 05 Jul 2012 20:55:24 +0900 (KST) From: Rajeshwari Shinde To: u-boot@lists.denx.de Cc: patches@linaro.org, alim.akhtar@samsung.com, sjg@chromium.org, hs@denx.de, mk7.kang@samsung.com, chander.kashyap@linaro.org, jy0922.shim@samsung.com Subject: [PATCH 2/7 V5] EXYNOS: Add I2C base address. Date: Thu, 05 Jul 2012 17:29:47 +0530 Message-id: <1341489592-24243-3-git-send-email-rajeshwari.s@samsung.com> X-Mailer: git-send-email 1.7.4.4 In-reply-to: <1341489592-24243-1-git-send-email-rajeshwari.s@samsung.com> References: <1341489592-24243-1-git-send-email-rajeshwari.s@samsung.com> X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFnrGJMWRmVeSWpSXmKPExsVy+t9jQd01DV/9Db4c1LR4uP4mi8WUw19Y HJg87lzbwxbAGMVlk5Kak1mWWqRvl8CVceDLUsaCgzwVb6ZXNDAe5Opi5OSQEDCReP9/KSuE LSZx4d56ti5GLg4hgemMEk+eP2aEcCYySRw43MYGUsUmYCSx9eQ0RhBbREBC4lf/VbAiZoFZ jBKLtjSCFQkLmEr0vp3M0sXIwcEioCrRNbMEJMwr4CFxYsUERohtChLHpn4F28wp4Cnxs/8Z G0i5EFDNxcUyExh5FzAyrGIUTS1ILihOSs811CtOzC0uzUvXS87P3cQI9v0zqR2MKxssDjEK cDAq8fAGZH31F2JNLCuuzD3EKMHBrCTC25sBFOJNSaysSi3Kjy8qzUktPsQozcGiJM5r7A2U EkhPLEnNTk0tSC2CyTJxcEo1MKq89Dnh3LXJJW/NLV6Jf1FtL/973Wn/NL3FfI32wu8fl1uw aAQLzbrlYDnJbKq6u/bag/6Z29fHV9bcC/1wyzNzZiRj5KmdZ34l3PLNEw7KCci4vmXLW8N+ b5M/h2v03KYGCIXt8eWcM+NS8rIb+wO5HR5kNNnuUhE8MNstzELojNZXRfFVzkosxRmJhlrM RcWJAAbsuBr5AQAA X-TM-AS-MML: No X-Gm-Message-State: ALoCoQkJaVm++4XIbPFMX1943CQcH0WsbxScaHQWxxT5dXjsbK8i+iQBQA/yVXefYlZnyalfx7/e This patch adds the base address for I2C. Signed-off-by: Alim Akhtar Signed-off-by: Rajeshwari Shinde Acked-by: Simon Glass --- Changes in V2: - None Changes in V3: - None Changes in V4: - None Changes in V5: - None arch/arm/include/asm/arch-exynos/cpu.h | 3 +++ 1 files changed, 3 insertions(+), 0 deletions(-) diff --git a/arch/arm/include/asm/arch-exynos/cpu.h b/arch/arm/include/asm/arch-exynos/cpu.h index b1e22f2..093bcc1 100644 --- a/arch/arm/include/asm/arch-exynos/cpu.h +++ b/arch/arm/include/asm/arch-exynos/cpu.h @@ -48,6 +48,7 @@ #define EXYNOS4_SROMC_BASE 0x12570000 #define EXYNOS4_USBPHY_BASE 0x125B0000 #define EXYNOS4_UART_BASE 0x13800000 +#define EXYNOS4_I2C_BASE 0x13860000 #define EXYNOS4_ADC_BASE 0x13910000 #define EXYNOS4_PWMTIMER_BASE 0x139D0000 #define EXYNOS4_MODEM_BASE 0x13A00000 @@ -74,6 +75,7 @@ #define EXYNOS5_USBOTG_BASE 0x12480000 #define EXYNOS5_USBPHY_BASE 0x12480000 #define EXYNOS5_UART_BASE 0x12C00000 +#define EXYNOS5_I2C_BASE 0x12C60000 #define EXYNOS5_PWMTIMER_BASE 0x12DD0000 #define EXYNOS5_GPIO_PART2_BASE 0x13400000 #define EXYNOS5_FIMD_BASE 0x14400000 @@ -146,6 +148,7 @@ SAMSUNG_BASE(adc, ADC_BASE) SAMSUNG_BASE(clock, CLOCK_BASE) SAMSUNG_BASE(sysreg, SYSREG_BASE) SAMSUNG_BASE(fimd, FIMD_BASE) +SAMSUNG_BASE(i2c, I2C_BASE) SAMSUNG_BASE(mipi_dsim, MIPI_DSIM_BASE) SAMSUNG_BASE(gpio_part1, GPIO_PART1_BASE) SAMSUNG_BASE(gpio_part2, GPIO_PART2_BASE)