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[203.254.224.33]) by mx.google.com with ESMTP id h8si32313582pay.163.2012.12.28.04.05.31; Fri, 28 Dec 2012 04:05:32 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of rajeshwari.s@samsung.com designates 203.254.224.33 as permitted sender) client-ip=203.254.224.33; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of rajeshwari.s@samsung.com designates 203.254.224.33 as permitted sender) smtp.mail=rajeshwari.s@samsung.com Received: from epcpsbgm1.samsung.com (epcpsbgm1 [203.254.230.26]) by mailout3.samsung.com (Oracle Communications Messaging Server 7u4-24.01(7.0.4.24.0) 64bit (built Nov 17 2011)) with ESMTP id <0MFQ005EQPKVSNY0@mailout3.samsung.com>; Fri, 28 Dec 2012 21:05:30 +0900 (KST) Received: from epcpsbgm1.samsung.com ( [172.20.52.122]) by epcpsbgm1.samsung.com (EPCPMTA) with SMTP id 5C.F2.01231.A0B8DD05; Fri, 28 Dec 2012 21:05:30 +0900 (KST) X-AuditID: cbfee61a-b7fa66d0000004cf-58-50dd8b0a3ffc Received: from epmmp2 ( [203.254.227.17]) by epcpsbgm1.samsung.com (EPCPMTA) with SMTP id DB.F2.01231.90B8DD05; Fri, 28 Dec 2012 21:05:29 +0900 (KST) Received: from rajeshwari-linux.sisodomain.com ([107.108.215.115]) by mmp2.samsung.com (Oracle Communications Messaging Server 7u4-24.01(7.0.4.24.0) 64bit (built Nov 17 2011)) with ESMTPA id <0MFQ00MRYPFC8100@mmp2.samsung.com>; Fri, 28 Dec 2012 21:05:29 +0900 (KST) From: Rajeshwari Shinde To: u-boot@lists.denx.de Cc: patches@linaro.org, sjg@chromium.org, mk7.kang@samsung.com, chander.kashyap@linaro.org, l.majewski@samsung.com Subject: [PATCH 3/4] SMDK5250: Add PMIC voltage settings Date: Fri, 28 Dec 2012 17:38:44 +0530 Message-id: <1356696525-21001-4-git-send-email-rajeshwari.s@samsung.com> X-Mailer: git-send-email 1.7.4.4 In-reply-to: <1356696525-21001-1-git-send-email-rajeshwari.s@samsung.com> References: <1356696525-21001-1-git-send-email-rajeshwari.s@samsung.com> DLP-Filter: Pass X-MTR: 20000000000000000@CPGS X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFnrALMWRmVeSWpSXmKPExsWyRsSkSper+26Awe5fnBYP199ksZhy+AuL A5PHnWt72AIYo7hsUlJzMstSi/TtErgyvt97xlrwRb7i7aQrbA2Mh6W7GDk4JARMJE4+ke9i 5AQyxSQu3FvP1sXIxSEksJRRYsPnJ4wwNQv3RUDEpzNKXP78ixXCmcgkse7xHUaQbjYBI4mt J6eB2SICEhK/+q+C2cwCJRLfvnWzgtjCAhYSOydfYgGxWQRUJZbP/8UMYvMKeEj8nPuQHeIK BYljU7+C1XMKeEoce3gNbI4QUM3Xw6tZIXoFJL5NPsQCcZysxKYDzCD3SAjcZ5N4dGI2I8Qc SYmDK26wTGAUXsDIsIpRNLUguaA4KT3XUK84Mbe4NC9dLzk/dxMjMBhP/3smtYNxZYPFIUYB DkYlHt6FPXcChFgTy4orcw8xSnAwK4nw9jXfDRDiTUmsrEotyo8vKs1JLT7E6AN0yURmKdHk fGCk5JXEGxqbmJsam1oaGZmZmuIQVhLnbfZICRASSE8sSc1OTS1ILYIZx8TBKdXAmJ86wyE5 oWiT4NMdfvVTfnEfecZp+S3ncHvJW/PnWrXX9WfNyPNK+5B8skl9zY8ci085ep6RgsZmAleT J809uLbg+JSArfEPltzVncL/pur+rMVWRdPmH041uuo8UzBuig/rrx9Ln5ruO2N1frHozMNO 323yzx2+/ePE5P+XLBI5uOdXHWjifqrEUpyRaKjFXFScCACX5HghcwIAAA== X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFprAIsWRmVeSWpSXmKPExsVy+t9jQV3O7rsBBrtfWFk8XH+TxWLK4S8s Dkwed67tYQtgjGpgtMlITUxJLVJIzUvOT8nMS7dV8g6Od443NTMw1DW0tDBXUshLzE21VXLx CdB1y8wBmq2kUJaYUwoUCkgsLlbSt8M0ITTETdcCpjFC1zckCK7HyAANJKxhzPh+7xlrwRf5 ireTrrA1MB6W7mLk4JAQMJFYuC+ii5ETyBSTuHBvPVsXIxeHkMB0RonLn3+xQjgTmSTWPb7D CFLFJmAksfXkNDBbREBC4lf/VTCbWaBE4tu3blYQW1jAQmLn5EssIDaLgKrE8vm/mEFsXgEP iZ9zH7JDbFOQODb1K1g9p4CnxLGH18DmCAHVfD28mnUCI+8CRoZVjKKpBckFxUnpuYZ6xYm5 xaV56XrJ+bmbGMHB/kxqB+PKBotDjAIcjEo8vAt77gQIsSaWFVfmHmKU4GBWEuHta74bIMSb klhZlVqUH19UmpNafIjRB+iqicxSosn5wEjMK4k3NDYxNzU2tTSxMDGzxCGsJM7b7JESICSQ nliSmp2aWpBaBDOOiYNTqoGx9/uzRT8CGziDVPR/Oc+4aCvF+erYl9MMr/1uaX0K4T+UEsjr arPMi93wxv9yxZmqeYutWZ8cbJqq1RyRJerxf/WsF/f2m7Kudrlyt8KU/XnK8kph3uKQOwxy azd/0eTIuHKictuW7bKq7BHOG39UsohvcDvV/O1rWqZEzpMdxt5ffx44vSBCiaU4I9FQi7mo OBEAUcf57KMCAAA= X-CFilter-Loop: Reflected X-Gm-Message-State: ALoCoQkQNqEpJIrsPwXfupM1/Tl9+SqwGvk6dcNlTQOsTXXGSWJZPiMrGsTKZQ4fkveWPf2iMd0e This patch adds required pmic voltage settings for SMDK5250. Signed-off-by: Rajeshwari Shinde --- board/samsung/smdk5250/smdk5250.c | 68 +++++++++++++++++++++++++++++++++++- include/power/max77686_pmic.h | 15 ++++++++ 2 files changed, 81 insertions(+), 2 deletions(-) diff --git a/board/samsung/smdk5250/smdk5250.c b/board/samsung/smdk5250/smdk5250.c index 73c3ec0..fe353a1 100644 --- a/board/samsung/smdk5250/smdk5250.c +++ b/board/samsung/smdk5250/smdk5250.c @@ -24,14 +24,17 @@ #include #include #include +#include #include #include #include #include #include #include +#include #include #include +#include DECLARE_GLOBAL_DATA_PTR; @@ -60,10 +63,71 @@ int dram_init(void) #if defined(CONFIG_POWER) int power_init_board(void) { + struct pmic *p; + u32 val; + + ps_hold_setup(); + + i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE); + if (pmic_init(I2C_PMIC)) return -1; - else - return 0; + + p = pmic_get("MAX77686_PMIC"); + if (!p) + return -ENODEV; + + if (pmic_probe(p)) + return -1; + + pmic_reg_read(p, MAX77686_REG_PMIC_32KHZ, &val); + val |= MAX77686_32KHCP_EN; + pmic_reg_write(p, MAX77686_REG_PMIC_32KHZ, val); + + pmic_reg_read(p, MAX77686_REG_PMIC_BBAT, &val); + val |= (MAX77686_BBCHOSTEN | MAX77686_BBCVS_3_5V); + pmic_reg_write(p, MAX77686_REG_PMIC_BBAT, val); + + pmic_reg_write(p, MAX77686_REG_PMIC_BUCK1OUT, MAX77686_BUCK1OUT_1V); + pmic_reg_read(p, MAX77686_REG_PMIC_BUCK1CRTL, &val); + val |= MAX77686_BUCK1CTRL_EN; + pmic_reg_write(p, MAX77686_REG_PMIC_BUCK1CRTL, val); + + pmic_reg_write(p, MAX77686_REG_PMIC_BUCK2DVS1, + MAX77686_BUCK2DVS1_1_3V); + pmic_reg_read(p, MAX77686_REG_PMIC_BUCK2CTRL1, &val); + val |= MAX77686_BUCK2CTRL_ON; + pmic_reg_write(p, MAX77686_REG_PMIC_BUCK2CTRL1, val); + + pmic_reg_write(p, MAX77686_REG_PMIC_BUCK3DVS1, + MAX77686_BUCK3DVS1_1_0125V); + pmic_reg_read(p, MAX77686_REG_PMIC_BUCK3CTRL, &val); + val |= MAX77686_BUCK3CTRL_ON; + pmic_reg_write(p, MAX77686_REG_PMIC_BUCK3CTRL, val); + + pmic_reg_write(p, MAX77686_REG_PMIC_BUCK4DVS1, + MAX77686_BUCK4DVS1_1_2V); + pmic_reg_read(p, MAX77686_REG_PMIC_BUCK4CTRL1, &val); + val |= MAX77686_BUCK4CTRL_ON; + pmic_reg_write(p, MAX77686_REG_PMIC_BUCK4CTRL1, val); + + pmic_reg_read(p, MAX77686_REG_PMIC_LDO2CTRL1, &val); + val |= (MAX77686_LD02CTRL1_1_5V | EN_LDO); + pmic_reg_write(p, MAX77686_REG_PMIC_LDO2CTRL1, val); + + pmic_reg_read(p, MAX77686_REG_PMIC_LDO3CTRL1, &val); + val |= (MAX77686_LD03CTRL1_1_8V | EN_LDO); + pmic_reg_write(p, MAX77686_REG_PMIC_LDO3CTRL1, val); + + pmic_reg_read(p, MAX77686_REG_PMIC_LDO5CTRL1, &val); + val |= (MAX77686_LD05CTRL1_1_8V | EN_LDO); + pmic_reg_write(p, MAX77686_REG_PMIC_LDO5CTRL1, val); + + pmic_reg_read(p, MAX77686_REG_PMIC_LDO10CTRL1, &val); + val |= (MAX77686_LD10CTRL1_1_8V | EN_LDO); + pmic_reg_write(p, MAX77686_REG_PMIC_LDO10CTRL1, val); + + return 0; } #endif diff --git a/include/power/max77686_pmic.h b/include/power/max77686_pmic.h index d949ace..fb3a8fb 100644 --- a/include/power/max77686_pmic.h +++ b/include/power/max77686_pmic.h @@ -155,4 +155,19 @@ enum { EN_LDO = (0x3 << 6), }; +#define MAX77686_BUCK1OUT_1V 0x5 +#define MAX77686_BUCK1CTRL_EN (3<<0) +#define MAX77686_BUCK2DVS1_1_3V 0x38 +#define MAX77686_BUCK2CTRL_ON (1<<4) +#define MAX77686_BUCK3DVS1_1_0125V 0x21 +#define MAX77686_BUCK3CTRL_ON (1<<4) +#define MAX77686_BUCK4DVS1_1_2V 0x30 +#define MAX77686_BUCK4CTRL_ON (1<<4) +#define MAX77686_LD02CTRL1_1_5V 0x1c +#define MAX77686_LD03CTRL1_1_8V 0x14 +#define MAX77686_LD05CTRL1_1_8V 0x14 +#define MAX77686_LD10CTRL1_1_8V 0x14 +#define MAX77686_32KHCP_EN (1<<1) +#define MAX77686_BBCHOSTEN (1<<0) +#define MAX77686_BBCVS_3_5V (3<<3) #endif /* __MAX77686_PMIC_H_ */