From patchwork Thu Oct 10 08:09:09 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Rajeshwari Shinde X-Patchwork-Id: 20929 Return-Path: X-Original-To: linaro@patches.linaro.org Delivered-To: linaro@patches.linaro.org Received: from mail-oa0-f69.google.com (mail-oa0-f69.google.com [209.85.219.69]) by ip-10-151-82-157.ec2.internal (Postfix) with ESMTPS id 999BF2611D for ; Thu, 10 Oct 2013 08:07:51 +0000 (UTC) Received: by mail-oa0-f69.google.com with SMTP id n10sf7157071oag.0 for ; Thu, 10 Oct 2013 01:07:50 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=mime-version:x-gm-message-state:delivered-to:from:to:cc:subject :date:message-id:in-reply-to:references:dlp-filter:x-original-sender :x-original-authentication-results:precedence:mailing-list:list-id :list-post:list-help:list-archive:list-unsubscribe; bh=qyqTd5ASgIMaCjsRKjckZAAXzY5dzL4+LLZzU4rIVxM=; b=ib7CyKNXbR1k2gqZKws0cW13EhX2Is3xWSq9zJopDso9KrJiboHiYO3+R5Qk5sGD1K qh4gpoXWn2ck9PtcxV0XsWyWMxMN9IX2iHRxCHOXNhosDSG5arvQHpZdg8iBgDBH1VYZ 7OOly6Zo6RTGSwHxp2lmhcir6awW77CYwlyBlPAVeHNXu4DrGE/rXEem1dfjClBXh6BS A/xhpnUyVIDNgyT7t3xU32ryoTPMmIuLJr+3iAD55EH+bZnojt/iuoLP+kA78o40NcAB uNijvQ/bPWta4zHw7a1rZAFv9HScqpNthg/Cj8JOeD2rh+NI5UsRvDPlMofpZIeBQG0e 8ZVA== X-Received: by 10.50.106.116 with SMTP id gt20mr4021275igb.0.1381392470342; Thu, 10 Oct 2013 01:07:50 -0700 (PDT) MIME-Version: 1.0 X-BeenThere: patchwork-forward@linaro.org Received: by 10.49.109.102 with SMTP id hr6ls968292qeb.13.gmail; Thu, 10 Oct 2013 01:07:50 -0700 (PDT) X-Received: by 10.221.46.134 with SMTP id uo6mr4569034vcb.72.1381392470198; Thu, 10 Oct 2013 01:07:50 -0700 (PDT) Received: from mail-vc0-f178.google.com (mail-vc0-f178.google.com [209.85.220.178]) by mx.google.com with ESMTPS id k11si13728042vcm.73.1969.12.31.16.00.00 (version=TLSv1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Thu, 10 Oct 2013 01:07:50 -0700 (PDT) Received-SPF: neutral (google.com: 209.85.220.178 is neither permitted nor denied by best guess record for domain of patch+caf_=patchwork-forward=linaro.org@linaro.org) client-ip=209.85.220.178; Received: by mail-vc0-f178.google.com with SMTP id lh4so1361632vcb.37 for ; Thu, 10 Oct 2013 01:07:50 -0700 (PDT) X-Gm-Message-State: ALoCoQnGYYfPaUdwBdbo7aWF6x5yGP0ZqPsm0C79NqwBE3BKN8FsbD9JMCroUf/j2QymK78jmd1w X-Received: by 10.52.227.165 with SMTP id sb5mr3849233vdc.85.1381392470092; Thu, 10 Oct 2013 01:07:50 -0700 (PDT) X-Forwarded-To: patchwork-forward@linaro.org X-Forwarded-For: patch@linaro.org patchwork-forward@linaro.org Delivered-To: patches@linaro.org Received: by 10.220.174.196 with SMTP id u4csp355396vcz; Thu, 10 Oct 2013 01:07:49 -0700 (PDT) X-Received: by 10.66.251.1 with SMTP id zg1mr7591429pac.160.1381392466440; Thu, 10 Oct 2013 01:07:46 -0700 (PDT) Received: from mailout2.samsung.com (mailout2.samsung.com. [203.254.224.25]) by mx.google.com with ESMTP id it5si33784058pbc.35.1969.12.31.16.00.00; Thu, 10 Oct 2013 01:07:46 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of rajeshwari.s@samsung.com designates 203.254.224.25 as permitted sender) client-ip=203.254.224.25; Received: from epcpsbgr2.samsung.com (u142.gpu120.samsung.co.kr [203.254.230.142]) by mailout2.samsung.com (Oracle Communications Messaging Server 7u4-24.01 (7.0.4.24.0) 64bit (built Nov 17 2011)) with ESMTP id <0MUG001UD18RH2O0@mailout2.samsung.com>; Thu, 10 Oct 2013 17:07:43 +0900 (KST) Received: from epcpsbgm2.samsung.com ( [172.20.52.122]) by epcpsbgr2.samsung.com (EPCPMTA) with SMTP id 26.33.17682.F4066525; Thu, 10 Oct 2013 17:07:43 +0900 (KST) X-AuditID: cbfee68e-b7f756d000004512-6d-5256604f0853 Received: from epmmp1.local.host ( [203.254.227.16]) by epcpsbgm2.samsung.com (EPCPMTA) with SMTP id B7.21.05832.F4066525; Thu, 10 Oct 2013 17:07:43 +0900 (KST) Received: from localhost.localdomain.com ([107.108.73.95]) by mmp1.samsung.com (Oracle Communications Messaging Server 7u4-24.01 (7.0.4.24.0) 64bit (built Nov 17 2011)) with ESMTPA id <0MUG00FEY18BC940@mmp1.samsung.com>; Thu, 10 Oct 2013 17:07:43 +0900 (KST) From: Rajeshwari S Shinde To: u-boot@lists.denx.de Cc: patches@linaro.org, sjg@chromium.org, mk7.kang@samsung.com, chander.kashyap@linaro.org, u-boot-review@google.com, panto@antoniou-consulting.com, alim.akhtar@samsung.com Subject: [PATCH 10/10 V5] DWMMC: SMDK5420: Disable SMU for eMMC Date: Thu, 10 Oct 2013 13:39:09 +0530 Message-id: <1381392549-24686-11-git-send-email-rajeshwari.s@samsung.com> X-Mailer: git-send-email 1.7.11.7 In-reply-to: <1381392549-24686-1-git-send-email-rajeshwari.s@samsung.com> References: <1381392549-24686-1-git-send-email-rajeshwari.s@samsung.com> X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFvrPLMWRmVeSWpSXmKPExsWyRsSkStc/ISzI4N1WIYsH87axWTxcf5PF ouNIC6PFrtuTWSymHP7CYvFtyzZGi+WvN7JbvN3bye7A4THv50Qmj9kNF1k8Fmwq9bhzbQ+b x9k7Oxg9+rasYgxgi+KySUnNySxLLdK3S+DKOHz1LHvBbdGKR7vmsTYwfhDsYuTkkBAwkfi3 ZhI7hC0mceHeerYuRi4OIYGljBLvVvYywRR1bL7MApFYxCjx7fh2dgini0lixf5dQFUcHGxA VRtPJIA0iAhISPzqv8oIYjMLbGCUmPOLG8QWFrCXaP08mxXEZhFQlTj5aSk7SCuvgKfE0d+G ELsUJWYseQbWygkU3rFxIxuILSTgIbGuaT8ryFoJgXXsEoc39jBDzBGQ+Db5EAvIHAkBWYlN B5gh5khKHFxxg2UCo/ACRoZVjKKpBckFxUnpRUZ6xYm5xaV56XrJ+bmbGIGBf/rfs74djDcP WB9iTAYaN5FZSjQ5Hxg5eSXxhsZmRhamJqbGRuaWZqQJK4nzqrVYBwoJpCeWpGanphakFsUX leakFh9iZOLglGpg1HhslfVjcZfdZWm/+5Y+Mzi8nunGXHgp3riQn1812O/3qSBdG+2tHG/i Qi/G2S9WdjHlfcxiIR63WEJ+8W7to5XP2rcc5ePim9q70/vSlbabGumH+qafVj0tdCBi53r+ JDP3FXrSnx/73bE2XjLT74HcridZjc97RPeaTY3UyfXTWNj/uyVViaU4I9FQi7moOBEAxoHB vpICAAA= X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFrrDIsWRmVeSWpSXmKPExsVy+t9jAV3/hLAgg4vTuCwezNvGZvFw/U0W i44jLYwWu25PZrGYcvgLi8W3LdsYLZa/3shu8XZvJ7sDh8e8nxOZPGY3XGTxWLCp1OPOtT1s Hmfv7GD06NuyijGALaqB0SYjNTEltUghNS85PyUzL91WyTs43jne1MzAUNfQ0sJcSSEvMTfV VsnFJ0DXLTMH6CIlhbLEnFKgUEBicbGSvh2mCaEhbroWMI0Rur4hQXA9RgZoIGENY8bhq2fZ C26LVjzaNY+1gfGDYBcjJ4eEgIlEx+bLLBC2mMSFe+vZuhi5OIQEFjFKfDu+nR3C6WKSWLF/ F1MXIwcHG1DHxhMJIA0iAhISv/qvMoLYzAIbGCXm/OIGsYUF7CVaP89mBbFZBFQlTn5ayg7S yivgKXH0tyHELkWJGUuegbVyAoV3bNzIBmILCXhIrGvazzqBkXcBI8MqRtHUguSC4qT0XCO9 4sTc4tK8dL3k/NxNjOC4eia9g3FVg8UhRgEORiUe3oqy0CAh1sSy4srcQ4wSHMxKIrzTTwKF eFMSK6tSi/Lji0pzUosPMSYDHTWRWUo0OR8Y83kl8YbGJuamxqaWJhYmZpakCSuJ8x5stQ4U EkhPLEnNTk0tSC2C2cLEwSnVwLjwb/DlAscjd98tU9lw31M+SnHf09iUktfTRGazBcjELvGZ 2z9xe8LXFc+77j97urbmqXKKwk3WtZskzu+ReCSWMnXnzj4ev9g894u746dPvrfjcO4c8x2T rsQkzTi/1ZFvBZ/LTeWuq/unh3ywtpX9dv1r4M0VPG+3LdnTeM3oZ+M0y+b7e15ZKrEUZyQa ajEXFScCAPCzXKXvAgAA DLP-Filter: Pass X-MTR: 20000000000000000@CPGS X-CFilter-Loop: Reflected X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: rajeshwari.s@samsung.com X-Original-Authentication-Results: mx.google.com; spf=neutral (google.com: 209.85.220.178 is neither permitted nor denied by best guess record for domain of patch+caf_=patchwork-forward=linaro.org@linaro.org) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Precedence: list Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org List-ID: X-Google-Group-Id: 836684582541 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , SMDK5420 has a new Security Management Unit added for dwmmc driver, hence, configuring the control registers to support booting via eMMC. Signed-off-by: Alim Akhtar Signed-off-by: Rajeshwari Shinde Acked-by: Simon Glass --- Changes in V3: - New patch. Changes in V4: Added flag to dissble SMU Changes in V5: - None drivers/mmc/dw_mmc.c | 10 ++++++++++ drivers/mmc/exynos_dw_mmc.c | 3 +++ include/dwmmc.h | 15 +++++++++++++++ 3 files changed, 28 insertions(+) diff --git a/drivers/mmc/dw_mmc.c b/drivers/mmc/dw_mmc.c index a82ee17..2a8da5c 100644 --- a/drivers/mmc/dw_mmc.c +++ b/drivers/mmc/dw_mmc.c @@ -300,6 +300,16 @@ static int dwmci_init(struct mmc *mmc) struct dwmci_host *host = (struct dwmci_host *)mmc->priv; u32 fifo_size; + if (host->quirks & DWMCI_QUIRK_DISABLE_SMU) { + dwmci_writel(host, EMMCP_MPSBEGIN0, 0); + dwmci_writel(host, EMMCP_SEND0, 0); + dwmci_writel(host, EMMCP_CTRL0, + MPSCTRL_SECURE_READ_BIT | + MPSCTRL_SECURE_WRITE_BIT | + MPSCTRL_NON_SECURE_READ_BIT | + MPSCTRL_NON_SECURE_WRITE_BIT | MPSCTRL_VALID); + } + dwmci_writel(host, DWMCI_PWREN, 1); if (!dwmci_wait_reset(host, DWMCI_RESET_ALL)) { diff --git a/drivers/mmc/exynos_dw_mmc.c b/drivers/mmc/exynos_dw_mmc.c index 4ef9fec..f7439a0 100644 --- a/drivers/mmc/exynos_dw_mmc.c +++ b/drivers/mmc/exynos_dw_mmc.c @@ -62,6 +62,9 @@ int exynos_dwmci_add_port(int index, u32 regbase, int bus_width, u32 clksel) host->name = "EXYNOS DWMMC"; host->ioaddr = (void *)regbase; host->buswidth = bus_width; +#ifdef CONFIG_EXYNOS5420 + host->quirks = DWMCI_QUIRK_DISABLE_SMU; +#endif if (clksel) { host->clksel_val = clksel; diff --git a/include/dwmmc.h b/include/dwmmc.h index 08ced0b..00bceec 100644 --- a/include/dwmmc.h +++ b/include/dwmmc.h @@ -49,6 +49,9 @@ #define DWMCI_DSCADDR 0x094 #define DWMCI_BUFADDR 0x098 #define DWMCI_DATA 0x200 +#define EMMCP_MPSBEGIN0 0x1200 +#define EMMCP_SEND0 0x1204 +#define EMMCP_CTRL0 0x120C /* Interrupt Mask register */ #define DWMCI_INTMSK_ALL 0xffffffff @@ -123,6 +126,18 @@ #define DWMCI_BMOD_IDMAC_FB (1 << 1) #define DWMCI_BMOD_IDMAC_EN (1 << 7) +#define MPSCTRL_SECURE_READ_BIT (0x1<<7) +#define MPSCTRL_SECURE_WRITE_BIT (0x1<<6) +#define MPSCTRL_NON_SECURE_READ_BIT (0x1<<5) +#define MPSCTRL_NON_SECURE_WRITE_BIT (0x1<<4) +#define MPSCTRL_USE_FUSE_KEY (0x1<<3) +#define MPSCTRL_ECB_MODE (0x1<<2) +#define MPSCTRL_ENCRYPTION (0x1<<1) +#define MPSCTRL_VALID (0x1<<0) + +/* quirks */ +#define DWMCI_QUIRK_DISABLE_SMU (1 << 0) + struct dwmci_host { char *name; void *ioaddr;