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[85.214.87.163]) by mx.google.com with ESMTP id du8si15429130bkc.207.2014.01.27.10.59.09 for ; Mon, 27 Jan 2014 10:59:10 -0800 (PST) Received-SPF: pass (google.com: domain of u-boot-bounces@lists.denx.de designates 85.214.87.163 as permitted sender) client-ip=85.214.87.163; Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 366A24B193; Mon, 27 Jan 2014 19:59:00 +0100 (CET) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id z9pw4dK9R1Te; Mon, 27 Jan 2014 19:58:59 +0100 (CET) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 028D64B199; Mon, 27 Jan 2014 19:58:42 +0100 (CET) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 6CB294B11B for ; Mon, 27 Jan 2014 19:58:21 +0100 (CET) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id 7ew3K0S1wJSz for ; Mon, 27 Jan 2014 19:58:20 +0100 (CET) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from mail-gw3-out.broadcom.com (mail-gw3-out.broadcom.com [216.31.210.64]) by theia.denx.de (Postfix) with ESMTP id 1D03B4B0DF for ; Mon, 27 Jan 2014 19:58:03 +0100 (CET) X-IronPort-AV: E=Sophos;i="4.95,730,1384329600"; d="scan'208";a="11327513" Received: from irvexchcas06.broadcom.com (HELO IRVEXCHCAS06.corp.ad.broadcom.com) ([10.9.208.53]) by mail-gw3-out.broadcom.com with ESMTP; 27 Jan 2014 11:05:24 -0800 Received: from IRVEXCHSMTP3.corp.ad.broadcom.com (10.9.207.53) by IRVEXCHCAS06.corp.ad.broadcom.com (10.9.208.53) with Microsoft SMTP Server (TLS) id 14.1.438.0; Mon, 27 Jan 2014 10:58:01 -0800 Received: from mail-irva-13.broadcom.com (10.10.10.20) by IRVEXCHSMTP3.corp.ad.broadcom.com (10.9.207.53) with Microsoft SMTP Server id 14.1.438.0; Mon, 27 Jan 2014 10:58:00 -0800 Received: from mail.broadcom.com (dhcp-rmna-vpn-80.ric.broadcom.com [10.136.253.80]) by mail-irva-13.broadcom.com (Postfix) with ESMTP id 78910246AC; Mon, 27 Jan 2014 10:58:00 -0800 (PST) From: Darwin Rambo To: Date: Mon, 27 Jan 2014 10:53:29 -0800 Message-ID: <1390848810-7227-6-git-send-email-drambo@broadcom.com> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1390848810-7227-1-git-send-email-drambo@broadcom.com> References: <1390848810-7227-1-git-send-email-drambo@broadcom.com> MIME-Version: 1.0 Cc: Darwin Rambo Subject: [U-Boot] [PATCH 5/6] mmc: kona: Add Kona mmc driver X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.11 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: , List-Help: , List-Subscribe: , Sender: u-boot-bounces@lists.denx.de Errors-To: u-boot-bounces@lists.denx.de X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: drambo@broadcom.com X-Original-Authentication-Results: mx.google.com; spf=neutral (google.com: 209.85.212.51 is neither permitted nor denied by best guess record for domain of patch+caf_=patchwork-forward=linaro.org@linaro.org) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org X-Google-Group-Id: 836684582541 Add support for the Kona SDHCI found on Broadcom mobile SoCs. Signed-off-by: Darwin Rambo Reviewed-by: Steve Rae Reviewed-by: Tim Kryger --- drivers/mmc/Makefile | 1 + drivers/mmc/kona_sdhci.c | 127 ++++++++++++++++++++++++++++++++++++++++++++++ 2 files changed, 128 insertions(+) create mode 100644 drivers/mmc/kona_sdhci.c diff --git a/drivers/mmc/Makefile b/drivers/mmc/Makefile index e793ed9..931922b 100644 --- a/drivers/mmc/Makefile +++ b/drivers/mmc/Makefile @@ -21,6 +21,7 @@ obj-$(CONFIG_OMAP_HSMMC) += omap_hsmmc.o obj-$(CONFIG_PXA_MMC_GENERIC) += pxa_mmc_gen.o obj-$(CONFIG_SDHCI) += sdhci.o obj-$(CONFIG_BCM2835_SDHCI) += bcm2835_sdhci.o +obj-$(CONFIG_KONA_SDHCI) += kona_sdhci.o obj-$(CONFIG_S5P_SDHCI) += s5p_sdhci.o obj-$(CONFIG_SH_MMCIF) += sh_mmcif.o obj-$(CONFIG_SPEAR_SDHCI) += spear_sdhci.o diff --git a/drivers/mmc/kona_sdhci.c b/drivers/mmc/kona_sdhci.c new file mode 100644 index 0000000..c38e18e --- /dev/null +++ b/drivers/mmc/kona_sdhci.c @@ -0,0 +1,127 @@ +/***************************************************************************** +* +* Copyright 2013 Broadcom Corporation. All rights reserved. +* +* SPDX-License-Identifier: GPL-2.0+ +* +*****************************************************************************/ + +#include +#include +#include +#include +#include + +#define SDHCI_CORECTRL_OFFSET 0x00008000 +#define SDHCI_CORECTRL_EN 0x01 +#define SDHCI_CORECTRL_RESET 0x02 + +#define SDHCI_CORESTAT_OFFSET 0x00008004 +#define SDHCI_CORESTAT_CD_SW 0x01 + +#define SDHCI_COREIMR_OFFSET 0x00008008 +#define SDHCI_COREIMR_IP 0x01 + +static int init_mmc_core(struct sdhci_host *host) +{ + unsigned int mask; + unsigned int timeout; + + if (sdhci_readb(host, SDHCI_SOFTWARE_RESET) & SDHCI_RESET_ALL) { + printf("%s: sd host controller reset error\n", __func__); + return 1; + } + + /* For kona a hardware reset before anything else. */ + mask = sdhci_readl(host, SDHCI_CORECTRL_OFFSET) | SDHCI_CORECTRL_RESET; + sdhci_writel(host, mask, SDHCI_CORECTRL_OFFSET); + + /* Wait max 100 ms */ + timeout = 1000; + do { + if (timeout == 0) { + printf("%s: reset timeout error\n", __func__); + return 1; + } + timeout--; + udelay(100); + } while (0 == + (sdhci_readl(host, SDHCI_CORECTRL_OFFSET) & + SDHCI_CORECTRL_RESET)); + + /* Clear the reset bit. */ + mask = mask & ~SDHCI_CORECTRL_RESET; + sdhci_writel(host, mask, SDHCI_CORECTRL_OFFSET); + udelay(10); + + /* Enable AHB clock */ + mask = sdhci_readl(host, SDHCI_CORECTRL_OFFSET); + sdhci_writel(host, mask | SDHCI_CORECTRL_EN, SDHCI_CORECTRL_OFFSET); + + /* Enable interrupts */ + sdhci_writel(host, SDHCI_COREIMR_IP, SDHCI_COREIMR_OFFSET); + + /* Make sure Card is detected in controller */ + mask = sdhci_readl(host, SDHCI_CORESTAT_OFFSET); + sdhci_writel(host, mask | SDHCI_CORESTAT_CD_SW, SDHCI_CORESTAT_OFFSET); + + return 0; +} + +int kona_sdhci_init(int dev_index, u32 min_clk, u32 quirks) +{ + int ret = 0; + u32 max_clk; + void *reg_base; + struct sdhci_host *host = NULL; + + host = (struct sdhci_host *)malloc(sizeof(struct sdhci_host)); + if (!host) { + printf("%s: sdhci host malloc fail!\n", __func__); + return -ENOMEM; + } + switch (dev_index) { + case 0: + reg_base = (void *)CONFIG_SYS_SDIO_BASE0; + ret = clk_sdio_enable(reg_base, CONFIG_SYS_SDIO0_MAX_CLK, + &max_clk); + break; + case 1: + reg_base = (void *)CONFIG_SYS_SDIO_BASE1; + ret = clk_sdio_enable(reg_base, CONFIG_SYS_SDIO1_MAX_CLK, + &max_clk); + break; + case 2: + reg_base = (void *)CONFIG_SYS_SDIO_BASE2; + ret = clk_sdio_enable(reg_base, CONFIG_SYS_SDIO2_MAX_CLK, + &max_clk); + break; + case 3: + reg_base = (void *)CONFIG_SYS_SDIO_BASE3; + ret = clk_sdio_enable(reg_base, CONFIG_SYS_SDIO3_MAX_CLK, + &max_clk); + break; + default: + printf("%s: sdio dev index %d not supported\n", + __func__, dev_index); + ret = -EINVAL; + } + if (ret) + return ret; + + host->name = "kona-sdhci"; + host->ioaddr = reg_base; + host->quirks = quirks; + host->host_caps = MMC_MODE_HC; + + if (init_mmc_core(host)) + return -EINVAL; + + if (quirks & SDHCI_QUIRK_REG32_RW) + host->version = sdhci_readl(host, SDHCI_HOST_VERSION - 2) >> 16; + else + host->version = sdhci_readw(host, SDHCI_HOST_VERSION); + + add_sdhci(host, max_clk, min_clk); + return ret; +}