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[85.214.87.163]) by mx.google.com with ESMTP id x43si10994284eey.124.2014.02.07.15.24.08 for ; Fri, 07 Feb 2014 15:24:09 -0800 (PST) Received-SPF: pass (google.com: domain of u-boot-bounces@lists.denx.de designates 85.214.87.163 as permitted sender) client-ip=85.214.87.163; Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id D84F14BB8C; Sat, 8 Feb 2014 00:23:57 +0100 (CET) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id fSeZVssDSDUT; Sat, 8 Feb 2014 00:23:57 +0100 (CET) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id BFEA24BB57; Sat, 8 Feb 2014 00:23:40 +0100 (CET) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id B559F4BAF3 for ; Sat, 8 Feb 2014 00:23:33 +0100 (CET) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id k2pK7g6VKyLX for ; Sat, 8 Feb 2014 00:23:30 +0100 (CET) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from arroyo.ext.ti.com (arroyo.ext.ti.com [192.94.94.40]) by theia.denx.de (Postfix) with ESMTPS id 5E8EC4BB2B for ; Sat, 8 Feb 2014 00:23:23 +0100 (CET) Received: from dflxv15.itg.ti.com ([128.247.5.124]) by arroyo.ext.ti.com (8.13.7/8.13.7) with ESMTP id s17NNJ8U008291; Fri, 7 Feb 2014 17:23:19 -0600 Received: from DLEE71.ent.ti.com (dlee71.ent.ti.com [157.170.170.114]) by dflxv15.itg.ti.com (8.14.3/8.13.8) with ESMTP id s17NNITW001139; Fri, 7 Feb 2014 17:23:19 -0600 Received: from dlep33.itg.ti.com (157.170.170.75) by DLEE71.ent.ti.com (157.170.170.114) with Microsoft SMTP Server id 14.2.342.3; Fri, 7 Feb 2014 17:23:18 -0600 Received: from ares-ubuntu.am.dhcp.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by dlep33.itg.ti.com (8.14.3/8.13.8) with ESMTP id s17NNI3I024485; Fri, 7 Feb 2014 17:23:18 -0600 Received: from a0868495 by ares-ubuntu.am.dhcp.ti.com with local (Exim 4.76) (envelope-from ) id 1WBulS-00055y-KZ; Fri, 07 Feb 2014 18:23:18 -0500 From: Murali Karicheri To: Date: Fri, 7 Feb 2014 18:23:12 -0500 Message-ID: <1391815393-19536-6-git-send-email-m-karicheri2@ti.com> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1391815393-19536-1-git-send-email-m-karicheri2@ti.com> References: <1391815393-19536-1-git-send-email-m-karicheri2@ti.com> MIME-Version: 1.0 Cc: trini@ti.com, Vitaly Andrianov Subject: [U-Boot] [U-Boot:RESEND][[PATCH 5/7 v1] NAND: DaVinci: allow forced disable of subpage writes X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.11 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: , List-Help: , List-Subscribe: , Sender: u-boot-bounces@lists.denx.de Errors-To: u-boot-bounces@lists.denx.de X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: m-karicheri2@ti.com X-Original-Authentication-Results: mx.google.com; spf=neutral (google.com: 209.85.128.176 is neither permitted nor denied by best guess record for domain of patch+caf_=patchwork-forward=linaro.org@linaro.org) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org X-Google-Group-Id: 836684582541 This patch introduces a configurable mechanism to disable subpage writes in the DaVinci NAND driver. Signed-off-by: Vitaly Andrianov Signed-off-by: Murali Karicheri --- - Resend with some more in cc - Updated README to include the option as per review comments README | 5 +++++ drivers/mtd/nand/davinci_nand.c | 3 +++ 2 files changed, 8 insertions(+) diff --git a/README b/README index aea82be..caf60a2 100644 --- a/README +++ b/README @@ -4427,6 +4427,11 @@ Low Level (hardware related) configuration options: - CONFIG_SPL_AM33XX_ENABLE_RTC32K_OSC: Enables the RTC32K OSC on AM33xx based plattforms +- CONFIG_SYS_NAND_NO_SUBPAGE_WRITE + Option to disable subpage write in NAND driver + Example driver that use this: + drivers/mtd/nand/davinci_nand.c + Freescale QE/FMAN Firmware Support: ----------------------------------- diff --git a/drivers/mtd/nand/davinci_nand.c b/drivers/mtd/nand/davinci_nand.c index 5b17d7b..75b03a7 100644 --- a/drivers/mtd/nand/davinci_nand.c +++ b/drivers/mtd/nand/davinci_nand.c @@ -609,6 +609,9 @@ void davinci_nand_init(struct nand_chip *nand) #ifdef CONFIG_SYS_NAND_USE_FLASH_BBT nand->bbt_options |= NAND_BBT_USE_FLASH; #endif +#ifdef CONFIG_SYS_NAND_NO_SUBPAGE_WRITE + nand->options |= NAND_NO_SUBPAGE_WRITE; +#endif #ifdef CONFIG_SYS_NAND_HW_ECC nand->ecc.mode = NAND_ECC_HW; nand->ecc.size = 512;