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[85.214.87.163]) by mx.google.com with ESMTP id l1si1904238wib.119.2015.03.03.03.11.45; Tue, 03 Mar 2015 03:11:46 -0800 (PST) Received-SPF: none (google.com: u-boot-bounces@lists.denx.de does not designate permitted sender hosts) client-ip=85.214.87.163; Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 4C2754B612; Tue, 3 Mar 2015 12:11:44 +0100 (CET) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id cY2auG2ci7dB; Tue, 3 Mar 2015 12:11:44 +0100 (CET) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id A80494B5F5; Tue, 3 Mar 2015 12:11:43 +0100 (CET) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id C51604B632 for ; Tue, 3 Mar 2015 12:11:39 +0100 (CET) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id osunGeJmI25H for ; Tue, 3 Mar 2015 12:11:39 +0100 (CET) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from mail-pd0-f176.google.com (mail-pd0-f176.google.com [209.85.192.176]) by theia.denx.de (Postfix) with ESMTPS id 82E944B60B for ; Tue, 3 Mar 2015 12:11:33 +0100 (CET) Received: by pdbft15 with SMTP id ft15so25327694pdb.11 for ; Tue, 03 Mar 2015 03:11:31 -0800 (PST) X-Received: by 10.70.91.8 with SMTP id ca8mr54703925pdb.156.1425381091212; Tue, 03 Mar 2015 03:11:31 -0800 (PST) Received: from localhost.localdomain ([223.227.218.142]) by mx.google.com with ESMTPSA id dq4sm584321pdb.96.2015.03.03.03.11.13 (version=TLSv1.1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Tue, 03 Mar 2015 03:11:30 -0800 (PST) From: Dileep Katta To: u-boot@lists.denx.de, robherring2@gmail.com, trini@ti.com, rob.herring@linaro.org, srae@broadcom.com, l.majewski@samsung.com, angelabaker@ti.com Date: Tue, 3 Mar 2015 16:40:41 +0530 Message-Id: <1425381044-19460-1-git-send-email-dileep.katta@linaro.org> X-Mailer: git-send-email 1.8.3.2 Cc: Dileep Katta Subject: [U-Boot] [PATCH v1 1/4] ARM: DRA7XX: Add config file for Android with fastboot support X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.15 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: , List-Help: , List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: dileep.katta@linaro.org X-Original-Authentication-Results: mx.google.com; spf=pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.217.178 as permitted sender) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org X-Google-Group-Id: 836684582541 Signed-off-by: Angela Stegmaier Signed-off-by: Dileep Katta --- arch/arm/cpu/armv7/omap5/Kconfig | 5 + board/ti/dra7xx/Kconfig | 13 ++ board/ti/dra7xx/MAINTAINERS | 2 + configs/dra7xx_evm_android_defconfig | 5 + include/configs/dra7xx_evm_android.h | 313 +++++++++++++++++++++++++++++++++++ 5 files changed, 338 insertions(+) create mode 100644 configs/dra7xx_evm_android_defconfig create mode 100644 include/configs/dra7xx_evm_android.h diff --git a/arch/arm/cpu/armv7/omap5/Kconfig b/arch/arm/cpu/armv7/omap5/Kconfig index aca862d..d8e9b2d 100644 --- a/arch/arm/cpu/armv7/omap5/Kconfig +++ b/arch/arm/cpu/armv7/omap5/Kconfig @@ -12,6 +12,11 @@ config TARGET_OMAP5_UEVM config TARGET_DRA7XX_EVM bool "TI DRA7XX" +config TARGET_DRA7XX_EVM_ANDROID + bool "TI DRA7XX ANDROID" + ---help--- + TI DRA7XX build for Android. Enables Fastboot. + config TARGET_BEAGLE_X15 bool "BeagleBoard X15" diff --git a/board/ti/dra7xx/Kconfig b/board/ti/dra7xx/Kconfig index 3bbd866..6837998 100644 --- a/board/ti/dra7xx/Kconfig +++ b/board/ti/dra7xx/Kconfig @@ -10,3 +10,16 @@ config SYS_CONFIG_NAME default "dra7xx_evm" endif + +if TARGET_DRA7XX_EVM_ANDROID + +config SYS_BOARD + default "dra7xx" + +config SYS_VENDOR + default "ti" + +config SYS_CONFIG_NAME + default "dra7xx_evm_android" + +endif diff --git a/board/ti/dra7xx/MAINTAINERS b/board/ti/dra7xx/MAINTAINERS index 5ec6769..efd4f81 100644 --- a/board/ti/dra7xx/MAINTAINERS +++ b/board/ti/dra7xx/MAINTAINERS @@ -6,3 +6,5 @@ F: include/configs/dra7xx_evm.h F: configs/dra7xx_evm_defconfig F: configs/dra7xx_evm_qspiboot_defconfig F: configs/dra7xx_evm_uart3_defconfig +F: include/configs/dra7xx_evm_android.h +F: configs/dra7xx_evm_android_defconfig diff --git a/configs/dra7xx_evm_android_defconfig b/configs/dra7xx_evm_android_defconfig new file mode 100644 index 0000000..64ae4b3 --- /dev/null +++ b/configs/dra7xx_evm_android_defconfig @@ -0,0 +1,5 @@ +CONFIG_SPL=y +CONFIG_SYS_EXTRA_OPTIONS="CONS_INDEX=1" ++S:CONFIG_ARM=y ++S:CONFIG_OMAP54XX=y ++S:CONFIG_TARGET_DRA7XX_EVM_ANDROID=y diff --git a/include/configs/dra7xx_evm_android.h b/include/configs/dra7xx_evm_android.h new file mode 100644 index 0000000..68e7eec --- /dev/null +++ b/include/configs/dra7xx_evm_android.h @@ -0,0 +1,313 @@ +/* + * (C) Copyright 2013 + * Texas Instruments Incorporated. + * Lokesh Vutla + * + * Configuration settings for the TI DRA7XX board. + * See ti_omap5_common.h for omap5 common settings. + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef __CONFIG_DRA7XX_EVM_ANDROID_H +#define __CONFIG_DRA7XX_EVM_ANDROID_H + +#define CONFIG_DRA7XX +#define CONFIG_BOARD_EARLY_INIT_F + +#ifndef CONFIG_QSPI_BOOT +/* MMC ENV related defines */ +#define CONFIG_ENV_IS_IN_MMC +#define CONFIG_SYS_MMC_ENV_DEV 1 /* SLOT2: eMMC(1) */ +#define CONFIG_ENV_SIZE (128 << 10) +#define CONFIG_ENV_OFFSET 0xE0000 +#define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE) +#define CONFIG_SYS_REDUNDAND_ENVIRONMENT +#endif +#define CONFIG_CMD_SAVEENV + +#if (CONFIG_CONS_INDEX == 1) +#define CONSOLEDEV "ttyO0" +#elif (CONFIG_CONS_INDEX == 3) +#define CONSOLEDEV "ttyO2" +#endif +#define CONFIG_SYS_NS16550_COM1 UART1_BASE /* Base EVM has UART0 */ +#define CONFIG_SYS_NS16550_COM2 UART2_BASE /* UART2 */ +#define CONFIG_SYS_NS16550_COM3 UART3_BASE /* UART3 */ +#define CONFIG_BAUDRATE 115200 + +#define CONFIG_SYS_OMAP_ABE_SYSCK + +/* Define the default GPT table for eMMC */ +#define PARTS_DEFAULT \ + "uuid_disk=${uuid_gpt_disk};" \ + "name=rootfs,start=2MiB,size=-,uuid=${uuid_gpt_rootfs}" + +#ifdef CONFIG_NAND +/* Define NAND information. */ +#define NANDARGS \ + "mtdids=" MTDIDS_DEFAULT "\0" \ + "mtdparts=" MTDPARTS_DEFAULT "\0" \ + "nandargs=setenv bootargs console=${console} " \ + "${optargs} " \ + "root=${nandroot} " \ + "rootfstype=${nandrootfstype}\0" \ + "nandroot=ubi0:rootfs rw ubi.mtd=NAND.file-system,2048\0" \ + "nandrootfstype=ubifs rootwait=1\0" \ + "nandboot=echo Booting from nand ...; " \ + "run nandargs; " \ + "nand read ${fdtaddr} NAND.u-boot-spl-os; " \ + "nand read ${loadaddr} NAND.kernel; " \ + "bootz ${loadaddr} - ${fdtaddr}\0" +#define NANDBOOT "run nandboot; " +#endif + +#define DFU_ALT_INFO_MMC \ + "dfu_alt_info_mmc=" \ + "boot part 0 1;" \ + "rootfs part 0 2;" \ + "MLO fat 0 1;" \ + "spl-os-args fat 0 1;" \ + "spl-os-image fat 0 1;" \ + "u-boot.img fat 0 1;" \ + "uEnv.txt fat 0 1\0" + +#define DFU_ALT_INFO_EMMC \ + "dfu_alt_info_emmc=" \ + "MLO raw 0x100 0x100 mmcpart 0;" \ + "u-boot.img raw 0x300 0x1000 mmcpart 0\0" + +#define DFU_ALT_INFO_RAM \ + "dfu_alt_info_ram=" \ + "kernel ram 0x80200000 0x4000000;" \ + "fdt ram 0x80f80000 0x80000;" \ + "ramdisk ram 0x81000000 0x4000000\0" + +#define DFUARGS \ + "dfu_bufsiz=0x10000\0" \ + DFU_ALT_INFO_MMC \ + DFU_ALT_INFO_EMMC \ + DFU_ALT_INFO_RAM + +/* Fastboot */ +#define CONFIG_CMD_FASTBOOT +#define CONFIG_ANDROID_BOOT_IMAGE +#define CONFIG_USB_FASTBOOT_BUF_ADDR CONFIG_SYS_LOAD_ADDR +#define CONFIG_USB_FASTBOOT_BUF_SIZE 0x2F000000 +#define CONFIG_FASTBOOT_FLASH +#define CONFIG_FASTBOOT_FLASH_MMC_DEV 1 + +#include + +/* Enhance our eMMC support / experience. */ +#define CONFIG_CMD_GPT +#define CONFIG_EFI_PARTITION +#define CONFIG_PARTITION_UUIDS +#define CONFIG_CMD_PART + +/* CPSW Ethernet */ +#define CONFIG_CMD_NET /* 'bootp' and 'tftp' */ +#define CONFIG_CMD_DHCP +#define CONFIG_BOOTP_DNS /* Configurable parts of CMD_DHCP */ +#define CONFIG_BOOTP_DNS2 +#define CONFIG_BOOTP_SEND_HOSTNAME +#define CONFIG_BOOTP_GATEWAY +#define CONFIG_BOOTP_SUBNETMASK +#define CONFIG_NET_RETRY_COUNT 10 +#define CONFIG_CMD_PING +#define CONFIG_CMD_MII +#define CONFIG_DRIVER_TI_CPSW /* Driver for IP block */ +#define CONFIG_MII /* Required in net/eth.c */ +#define CONFIG_PHY_GIGE /* per-board part of CPSW */ +#define CONFIG_PHYLIB + +/* SPI */ +#undef CONFIG_OMAP3_SPI +#define CONFIG_TI_QSPI +#define CONFIG_SPI_FLASH +#define CONFIG_SPI_FLASH_SPANSION +#define CONFIG_CMD_SF +#define CONFIG_CMD_SPI +#define CONFIG_SPI_FLASH_BAR +#define CONFIG_TI_SPI_MMAP +#define CONFIG_SF_DEFAULT_SPEED 48000000 +#define CONFIG_DEFAULT_SPI_MODE SPI_MODE_3 + +/* + * Default to using SPI for environment, etc. + * 0x000000 - 0x010000 : QSPI.SPL (64KiB) + * 0x010000 - 0x020000 : QSPI.SPL.backup1 (64KiB) + * 0x020000 - 0x030000 : QSPI.SPL.backup2 (64KiB) + * 0x030000 - 0x040000 : QSPI.SPL.backup3 (64KiB) + * 0x040000 - 0x140000 : QSPI.u-boot (1MiB) + * 0x140000 - 0x1C0000 : QSPI.u-boot-spl-os (512KiB) + * 0x1C0000 - 0x1D0000 : QSPI.u-boot-env (64KiB) + * 0x1D0000 - 0x1E0000 : QSPI.u-boot-env.backup1 (64KiB) + * 0x1E0000 - 0x9E0000 : QSPI.kernel (8MiB) + * 0x9E0000 - 0x2000000 : USERLAND + */ +#define CONFIG_SYS_SPI_KERNEL_OFFS 0x1E0000 +#define CONFIG_SYS_SPI_ARGS_OFFS 0x140000 +#define CONFIG_SYS_SPI_ARGS_SIZE 0x80000 +#if defined(CONFIG_QSPI_BOOT) +/* In SPL, use the environment and discard MMC support for space. */ +#ifdef CONFIG_SPL_BUILD +#undef CONFIG_SPL_MMC_SUPPORT +#undef CONFIG_SPL_MAX_SIZE +#define CONFIG_SPL_MAX_SIZE (64 << 10) /* 64 KiB */ +#endif +#define CONFIG_SPL_ENV_SUPPORT +#define CONFIG_ENV_IS_IN_SPI_FLASH +#define CONFIG_SYS_REDUNDAND_ENVIRONMENT +#define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED +#define CONFIG_ENV_SIZE (64 << 10) +#define CONFIG_ENV_SECT_SIZE (64 << 10) /* 64 KB sectors */ +#define CONFIG_ENV_OFFSET 0x1C0000 +#define CONFIG_ENV_OFFSET_REDUND 0x1D0000 +#endif + +/* SPI SPL */ +#define CONFIG_SPL_SPI_SUPPORT +#define CONFIG_SPL_DMA_SUPPORT +#ifdef CONFIG_SPL_BUILD +#define CONFIG_TI_EDMA +#endif +#define CONFIG_SPL_SPI_LOAD +#define CONFIG_SPL_SPI_FLASH_SUPPORT +#define CONFIG_SPL_SPI_BUS 0 +#define CONFIG_SPL_SPI_CS 0 +#define CONFIG_SYS_SPI_U_BOOT_OFFS 0x80000 + +#define CONFIG_SUPPORT_EMMC_BOOT + +/* USB xHCI HOST */ +#define CONFIG_CMD_USB +#define CONFIG_USB_HOST +#define CONFIG_USB_XHCI +#define CONFIG_USB_XHCI_OMAP +#define CONFIG_USB_STORAGE +#define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS 2 + +#define CONFIG_OMAP_USB_PHY +#define CONFIG_OMAP_USB2PHY2_HOST + +/* USB GADGET */ +#define CONFIG_USB_DWC3_PHY_OMAP +#define CONFIG_USB_DWC3_OMAP +#define CONFIG_USB_DWC3 +#define CONFIG_USB_DWC3_GADGET + +#define CONFIG_USB_GADGET +#define CONFIG_MUSB_GADGET +#define CONFIG_MUSB_PIO_ONLY +#define CONFIG_USBDOWNLOAD_GADGET +#define CONFIG_USB_GADGET_VBUS_DRAW 2 +#define CONFIG_G_DNL_MANUFACTURER "Texas Instruments" +#define CONFIG_G_DNL_VENDOR_NUM 0x0451 +#define CONFIG_G_DNL_PRODUCT_NUM 0xd022 +#define CONFIG_USB_GADGET_DUALSPEED + +/* USB Device Firmware Update support */ +#define CONFIG_DFU_FUNCTION +#define CONFIG_DFU_RAM +#define CONFIG_CMD_DFU + +#define CONFIG_DFU_MMC +#define CONFIG_DFU_RAM + +/* SATA */ +#define CONFIG_BOARD_LATE_INIT +#define CONFIG_CMD_SCSI +#define CONFIG_LIBATA +#define CONFIG_SCSI_AHCI +#define CONFIG_SCSI_AHCI_PLAT +#define CONFIG_SYS_SCSI_MAX_SCSI_ID 1 +#define CONFIG_SYS_SCSI_MAX_LUN 1 +#define CONFIG_SYS_SCSI_MAX_DEVICE (CONFIG_SYS_SCSI_MAX_SCSI_ID * \ + CONFIG_SYS_SCSI_MAX_LUN) + +/* NAND support */ +#ifdef CONFIG_NAND +/* NAND: device related configs */ +#define CONFIG_SYS_NAND_PAGE_SIZE 2048 +#define CONFIG_SYS_NAND_OOBSIZE 64 +#define CONFIG_SYS_NAND_BLOCK_SIZE (128*1024) +#define CONFIG_SYS_NAND_BUSWIDTH_16BIT +#define CONFIG_SYS_NAND_PAGE_COUNT (CONFIG_SYS_NAND_BLOCK_SIZE / \ + CONFIG_SYS_NAND_PAGE_SIZE) +#define CONFIG_SYS_NAND_5_ADDR_CYCLE +/* NAND: driver related configs */ +#define CONFIG_NAND_OMAP_GPMC +#define CONFIG_NAND_OMAP_ELM +#define CONFIG_SYS_NAND_ONFI_DETECTION +#define CONFIG_NAND_OMAP_ECCSCHEME OMAP_ECC_BCH8_CODE_HW +#define CONFIG_SYS_NAND_BAD_BLOCK_POS NAND_LARGE_BADBLOCK_POS +#define CONFIG_SYS_NAND_ECCPOS { 2, 3, 4, 5, 6, 7, 8, 9, \ + 10, 11, 12, 13, 14, 15, 16, 17, \ + 18, 19, 20, 21, 22, 23, 24, 25, \ + 26, 27, 28, 29, 30, 31, 32, 33, \ + 34, 35, 36, 37, 38, 39, 40, 41, \ + 42, 43, 44, 45, 46, 47, 48, 49, \ + 50, 51, 52, 53, 54, 55, 56, 57, } +#define CONFIG_SYS_NAND_ECCSIZE 512 +#define CONFIG_SYS_NAND_ECCBYTES 14 +#define MTDIDS_DEFAULT "nand0=nand.0" +#define MTDPARTS_DEFAULT "mtdparts=nand.0:" \ + "128k(NAND.SPL)," \ + "128k(NAND.SPL.backup1)," \ + "128k(NAND.SPL.backup2)," \ + "128k(NAND.SPL.backup3)," \ + "256k(NAND.u-boot-spl-os)," \ + "1m(NAND.u-boot)," \ + "128k(NAND.u-boot-env)," \ + "128k(NAND.u-boot-env.backup1)," \ + "8m(NAND.kernel)," \ + "-(NAND.file-system)" +#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x000c0000 +/* NAND: SPL related configs */ +#ifdef CONFIG_SPL_NAND_SUPPORT +#define CONFIG_SPL_NAND_AM33XX_BCH +#endif +/* NAND: SPL falcon mode configs */ +#ifdef CONFIG_SPL_OS_BOOT +#define CONFIG_CMD_SPL_NAND_OFS 0x00080000 /* os-boot params*/ +#define CONFIG_SYS_NAND_SPL_KERNEL_OFFS 0x00200000 /* kernel offset */ +#define CONFIG_CMD_SPL_WRITE_SIZE 0x2000 +#endif +#endif /* !CONFIG_NAND */ + +/* Parallel NOR Support */ +#if defined(CONFIG_NOR) +/* NOR: device related configs */ +#define CONFIG_SYS_MAX_FLASH_SECT 512 +#define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT +#define CONFIG_SYS_FLASH_SIZE (64 * 1024 * 1024) /* 64 MB */ +/* #define CONFIG_INIT_IGNORE_ERROR */ +#undef CONFIG_SYS_NO_FLASH +#define CONFIG_CMD_FLASH +#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE +#define CONFIG_SYS_FLASH_PROTECTION +#define CONFIG_SYS_FLASH_CFI +#define CONFIG_FLASH_CFI_DRIVER +#define CONFIG_FLASH_CFI_MTD +#define CONFIG_SYS_MAX_FLASH_BANKS 1 +#define CONFIG_SYS_FLASH_BASE (0x08000000) +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE +/* Reduce SPL size by removing unlikey targets */ +#ifdef CONFIG_NOR_BOOT +#define CONFIG_ENV_IS_IN_FLASH +#define CONFIG_ENV_SECT_SIZE (128 * 1024) /* 128 KiB */ +#define MTDIDS_DEFAULT "nor0=physmap-flash.0" +#define MTDPARTS_DEFAULT "mtdparts=physmap-flash.0:" \ + "1m(NOR.u-boot)," \ + "128k(NOR.u-boot-env)," \ + "128k(NOR.u-boot-env.backup1)," \ + "256k(NOR.u-boot-spl-os)," \ + "8m(NOR.kernel)," \ + "-(NOR.rootfs)" +#define CONFIG_ENV_OFFSET 0x00100000 +#define CONFIG_ENV_OFFSET_REDUND 0x00120000 +#endif +#endif /* NOR support */ + +#endif /* __CONFIG_DRA7XX_EVM_ANDROID_H */