From patchwork Wed Aug 10 07:08:40 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Masahiro Yamada X-Patchwork-Id: 73599 Delivered-To: patch@linaro.org Received: by 10.140.29.52 with SMTP id a49csp261017qga; Wed, 10 Aug 2016 00:15:15 -0700 (PDT) X-Received: by 10.28.150.146 with SMTP id y140mr1628246wmd.32.1470813315760; Wed, 10 Aug 2016 00:15:15 -0700 (PDT) Return-Path: Received: from theia.denx.de (theia.denx.de. [85.214.87.163]) by mx.google.com with ESMTP id k23si6711537wmc.105.2016.08.10.00.15.15; Wed, 10 Aug 2016 00:15:15 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of u-boot-bounces@lists.denx.de designates 85.214.87.163 as permitted sender) client-ip=85.214.87.163; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@nifty.com; spf=pass (google.com: best guess record for domain of u-boot-bounces@lists.denx.de designates 85.214.87.163 as permitted sender) smtp.mailfrom=u-boot-bounces@lists.denx.de Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id CDF164BB1A; Wed, 10 Aug 2016 09:15:13 +0200 (CEST) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id FYu6F0ZaCBuI; Wed, 10 Aug 2016 09:15:13 +0200 (CEST) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 28E40A74FB; Wed, 10 Aug 2016 09:14:23 +0200 (CEST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 57EB9A7537 for ; Wed, 10 Aug 2016 09:07:34 +0200 (CEST) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id Ymn8XEE9Yq-3 for ; Wed, 10 Aug 2016 09:07:33 +0200 (CEST) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from conuserg-11.nifty.com (conuserg-11.nifty.com [210.131.2.78]) by theia.denx.de (Postfix) with ESMTPS id 6BCBF4BE6F for ; Wed, 10 Aug 2016 09:07:22 +0200 (CEST) Received: from beagle.diag.org (p14092-ipngnfx01kyoto.kyoto.ocn.ne.jp [153.142.97.92]) (authenticated) by conuserg-11.nifty.com with ESMTP id u7A76xSq005792; Wed, 10 Aug 2016 16:07:02 +0900 DKIM-Filter: OpenDKIM Filter v2.10.3 conuserg-11.nifty.com u7A76xSq005792 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nifty.com; s=dec2015msa; t=1470812822; bh=JDA1yAUw5a1xk/3rhhYq5Ak7EHqOD4SCGO3UghSf15I=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=PJW9mro/aJ/TtWnUR+BfgplLW1iP6t5co2eIKEy3v/garxX8xEnPOklua1UyrQi0z DWJp30fvM+jtTcH/tCYf69G23gthqV8GsPRh65zuYYd1k80it3LmQjf6H3ndeuRLbh +y+YtgoD5fHK4GX3KrUy+hX9Vg946umzbnduRwG0SEvoZ+VV5880Fmxy2GZHo6xUSi JbJUMQsqfAjVryyRJk9cWnbIScwsapE2kR3uhb6M7dwo3POwf1k3ud8VGD2tV6LpnK /6GUovcJ46yCfZvVJv+24uBgD32bM6Np40f1t4asxM27kxSPFX9R466EwMa7VsnI8R xSWD4Z4N9hg8w== X-Nifty-SrcIP: [153.142.97.92] From: Masahiro Yamada To: u-boot@lists.denx.de Date: Wed, 10 Aug 2016 16:08:40 +0900 Message-Id: <1470812929-21178-6-git-send-email-yamada.masahiro@socionext.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1470812929-21178-1-git-send-email-yamada.masahiro@socionext.com> References: <1470812929-21178-1-git-send-email-yamada.masahiro@socionext.com> Subject: [U-Boot] [PATCH 05/14] ARM: uniphier: fix ROM boot mode for PH1-sLD3 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.15 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" Commit 4b50369fb535 ("ARM: uniphier: create early page table at run-time") broke the ROM boot mode for PH1-sLD3 SoC, because the run-time page table creation requires the outer cache register access but the page table in the sLD3 Boot ROM does not straight-map virtual/physical addresses. The idea here is to check the current page table to determine if it is a straight map table. If not, adjust the outer cache register base. Signed-off-by: Masahiro Yamada --- arch/arm/mach-uniphier/arm32/lowlevel_init.S | 5 +++++ 1 file changed, 5 insertions(+) -- 1.9.1 _______________________________________________ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot diff --git a/arch/arm/mach-uniphier/arm32/lowlevel_init.S b/arch/arm/mach-uniphier/arm32/lowlevel_init.S index 2be9505..b0c94ad 100644 --- a/arch/arm/mach-uniphier/arm32/lowlevel_init.S +++ b/arch/arm/mach-uniphier/arm32/lowlevel_init.S @@ -99,6 +99,11 @@ ENDPROC(enable_mmu) ENTRY(setup_init_ram) ldr r1, = SSCO_BASE + mrc p15, 0, r0, c2, c0, 0 @ TTBR0 + ldr r0, [r0, #0x400] @ entry for virtual address 0x100***** + bfc r0, #0, #20 + cmp r0, #0x50000000 @ is sLD3 page table? + biceq r1, r1, #0xc0000000 @ sLD3 ROM maps 0x5******* to 0x1******* /* Touch to zero for the boot way */ 0: ldr r0, = 0x00408006 @ touch to zero with address range