From patchwork Fri Sep 8 19:08:25 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Suman Anna X-Patchwork-Id: 112134 Delivered-To: patch@linaro.org Received: by 10.140.106.117 with SMTP id d108csp708914qgf; Fri, 8 Sep 2017 12:10:59 -0700 (PDT) X-Google-Smtp-Source: ADKCNb6g4qWyD5Rjhy4wsRhU2l6XMLlxztrOWwUxpsM5/+9+h/duoKOzGOVG4FCjc8bX+0Y3y/9H X-Received: by 10.80.206.11 with SMTP id y11mr3036299edi.94.1504897859479; Fri, 08 Sep 2017 12:10:59 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1504897859; cv=none; d=google.com; s=arc-20160816; b=iVS2FLjNmboZxbAOKF5X3kyv3q8bGPfv3pXFtXUpVBIZ9vMWPH3+rwL8mlS0KRAa3K s5DlkBRW+/b6w/aiPOnFi56h65gnPPOIOjRjLti2Kco7ZBhoztBc2j9oEs3InfLUDPTp 9rxGupqkGmvkJM9UZN+K7Xx0/GXl2//pkIrh//2rwxl41UVr3WcKrau2EQOWTWFaEJY4 X3x631lG0ayorl+H/C8htGRLxRMrYNgRJI8S0Q1blJmQ+Tgf1iEvhBCKiazIHNG15m3s rdPc0JamtgpPNIpXKfrL/oF/w0iJ9GiDrXnP3K80RPSk6U9jTHPeJSyuMHY4fqYoMeFR RZSw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:content-transfer-encoding:list-subscribe:list-help :list-post:list-archive:list-unsubscribe:list-id:precedence:subject :cc:mime-version:references:in-reply-to:message-id:date:to:from :dkim-signature:arc-authentication-results; bh=I0PR23mvwWjIN1pOJHiAdmqN7QMPq3dkzFQlIzFeX0o=; b=DIqi8F/OOp9kwxxxYmD/4OVi/0so5fyrvJtXiufJm7BYO9PsMmZ3xWMYZRKAQzlRfy MQWzocz95h8I62NEO2cj4deqE4j+jhjzeFxcjN4/7rEcfGwJ3+zurYuugMMRZSkgUWUI kCAkoVYrRIPiksYs/PUJNec5Y8jpYcDA32GOcvBQBCrN1a/SBeaHLDe2EpqXWwhQVPb+ aK/klgriRJoaJIWRMUWf7MnRdGBUkFnO0jk3OgYJLWg5S90BUrFNPy2eYyV8YxlFtfRB 6K3VYj8hXUcZC+zaEl1jc5CdJQAOAGFQYevySj/RO1i+Cnk7dDJUKf9bGseAqIY8u31o qkhw== ARC-Authentication-Results: i=1; mx.google.com; dkim=neutral (body hash did not verify) header.i=@ti.com header.s=ti-com-17Q1 header.b=if8pkcf1; spf=pass (google.com: best guess record for domain of u-boot-bounces@lists.denx.de designates 81.169.180.215 as permitted sender) smtp.mailfrom=u-boot-bounces@lists.denx.de; dmarc=fail (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Return-Path: Received: from lists.denx.de (dione.denx.de. [81.169.180.215]) by mx.google.com with ESMTP id r55si2484235edd.139.2017.09.08.12.10.59; Fri, 08 Sep 2017 12:10:59 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of u-boot-bounces@lists.denx.de designates 81.169.180.215 as permitted sender) client-ip=81.169.180.215; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@ti.com header.s=ti-com-17Q1 header.b=if8pkcf1; spf=pass (google.com: best guess record for domain of u-boot-bounces@lists.denx.de designates 81.169.180.215 as permitted sender) smtp.mailfrom=u-boot-bounces@lists.denx.de; dmarc=fail (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: by lists.denx.de (Postfix, from userid 105) id E1A79C21C34; Fri, 8 Sep 2017 19:10:40 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=0.0 required=5.0 tests=RCVD_IN_DNSWL_NONE, T_DKIM_INVALID autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id 588F3C21F0B; Fri, 8 Sep 2017 19:10:21 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id 0D7EAC21CB2; Fri, 8 Sep 2017 19:10:00 +0000 (UTC) Received: from lelnx194.ext.ti.com (lelnx194.ext.ti.com [198.47.27.80]) by lists.denx.de (Postfix) with ESMTPS id 8FBA0C21EE8 for ; Fri, 8 Sep 2017 19:09:56 +0000 (UTC) Received: from dflxv15.itg.ti.com ([128.247.5.124]) by lelnx194.ext.ti.com (8.15.1/8.15.1) with ESMTP id v88J8cBn009868; Fri, 8 Sep 2017 14:08:38 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ti.com; s=ti-com-17Q1; t=1504897718; bh=yjGrYd4sA19s6cXrtMCb5s200UXVn+poz5lgEizQGTE=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=if8pkcf1gU4oKYFCrrv0TBiKJMMpHa/sks5Uz+rEifstQtT2DM3aLDM9mecivtkwW pz5qp15c9t3R/iukx9QKVdmwOSLAdwFJli2QVtp2iLUiaiZCotgG3tljGYd7GgPMVi fjwqtKPS5LynyvgYBa7GtUR5uqS1i46AIhUHAcWk= Received: from DFLE104.ent.ti.com (dfle104.ent.ti.com [10.64.6.25]) by dflxv15.itg.ti.com (8.14.3/8.13.8) with ESMTP id v88J8cX1031255; Fri, 8 Sep 2017 14:08:38 -0500 Received: from DFLE107.ent.ti.com (10.64.6.28) by DFLE104.ent.ti.com (10.64.6.25) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384_P256) id 15.1.845.34; Fri, 8 Sep 2017 14:08:38 -0500 Received: from dflp32.itg.ti.com (10.64.6.15) by DFLE107.ent.ti.com (10.64.6.28) with Microsoft SMTP Server (version=TLS1_0, cipher=TLS_RSA_WITH_AES_256_CBC_SHA) id 15.1.845.34 via Frontend Transport; Fri, 8 Sep 2017 14:08:38 -0500 Received: from legion.dal.design.ti.com (legion.dal.design.ti.com [128.247.22.53]) by dflp32.itg.ti.com (8.14.3/8.13.8) with ESMTP id v88J8b2E021736; Fri, 8 Sep 2017 14:08:38 -0500 Received: from localhost (irmo.dhcp.ti.com [128.247.58.153]) by legion.dal.design.ti.com (8.11.7p1+Sun/8.11.7) with ESMTP id v88J8b302548; Fri, 8 Sep 2017 14:08:37 -0500 (CDT) From: Suman Anna To: Uri Mashiach Date: Fri, 8 Sep 2017 14:08:25 -0500 Message-ID: <20170908190825.21515-3-s-anna@ti.com> X-Mailer: git-send-email 2.13.1 In-Reply-To: <20170908190825.21515-1-s-anna@ti.com> References: <20170908190825.21515-1-s-anna@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Cc: Tom Rini , u-boot@lists.denx.de Subject: [U-Boot] [PATCH 2/2] ARM: DRA7: Cleanup old pinctrl macros X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" Commit 6ae4c3efbd62 ("ARM: DRA7: Add pinctrl register definitions") has added new macros for pinmux configuration in line with the kernel definitions. Cleanup the old pinctrl macros from the common header file so that they are not used by any new boards. Signed-off-by: Suman Anna --- arch/arm/include/asm/arch-omap5/mux_dra7xx.h | 14 -------------- 1 file changed, 14 deletions(-) diff --git a/arch/arm/include/asm/arch-omap5/mux_dra7xx.h b/arch/arm/include/asm/arch-omap5/mux_dra7xx.h index 5eed98ca27a4..55f49c784857 100644 --- a/arch/arm/include/asm/arch-omap5/mux_dra7xx.h +++ b/arch/arm/include/asm/arch-omap5/mux_dra7xx.h @@ -12,20 +12,6 @@ #include -#define FSC (1 << 19) -#define SSC (0 << 19) - -#define IEN (1 << 18) -#define IDIS (0 << 18) - -#define PTU (1 << 17) -#define PTD (0 << 17) -#define PEN (1 << 16) -#define PDIS (0 << 16) - -#define WKEN (1 << 24) -#define WKDIS (0 << 24) - #define PULL_ENA (0 << 16) #define PULL_DIS (1 << 16) #define PULL_UP (1 << 17)