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Signed-off-by: Manivannan Sadhasivam Reviewed-by: Simon Glass --- configs/hikey_defconfig | 1 + drivers/mmc/hi6220_dw_mmc.c | 100 +++++++++++++++++++++++++----------- 2 files changed, 70 insertions(+), 31 deletions(-) diff --git a/configs/hikey_defconfig b/configs/hikey_defconfig index 8dc5a2823e..cced2b4802 100644 --- a/configs/hikey_defconfig +++ b/configs/hikey_defconfig @@ -18,6 +18,7 @@ CONFIG_DEFAULT_DEVICE_TREE="hi6220-hikey" CONFIG_ENV_IS_IN_FAT=y CONFIG_ENV_FAT_INTERFACE="mmc" CONFIG_ENV_FAT_DEVICE_AND_PART="1:1" +CONFIG_DM_MMC=y CONFIG_MMC_DW=y CONFIG_MMC_DW_K3=y CONFIG_CONS_INDEX=4 diff --git a/drivers/mmc/hi6220_dw_mmc.c b/drivers/mmc/hi6220_dw_mmc.c index ce395d53c9..cc58aff38c 100644 --- a/drivers/mmc/hi6220_dw_mmc.c +++ b/drivers/mmc/hi6220_dw_mmc.c @@ -5,51 +5,89 @@ */ #include +#include #include +#include +#include #include -#include -#define DWMMC_MAX_CH_NUM 4 +DECLARE_GLOBAL_DATA_PTR; -#define DWMMC_MAX_FREQ 50000000 -#define DWMMC_MIN_FREQ 400000 +struct hi6220_dwmmc_plat { + struct mmc_config cfg; + struct mmc mmc; +}; -/* Source clock is configured to 100MHz by ATF bl1*/ -#define MMC0_DEFAULT_FREQ 100000000 +struct hi6220_dwmmc_priv_data { + struct dwmci_host host; +}; -static int hi6220_dwmci_core_init(struct dwmci_host *host, int index) +static int hi6220_dwmmc_ofdata_to_platdata(struct udevice *dev) { - host->name = "Hisilicon DWMMC"; + struct hi6220_dwmmc_priv_data *priv = dev_get_priv(dev); + struct dwmci_host *host = &priv->host; - host->dev_index = index; + host->name = dev->name; + host->ioaddr = (void *)devfdt_get_addr(dev); + host->buswidth = fdtdec_get_int(gd->fdt_blob, dev_of_offset(dev), + "bus-width", 4); + + /* use non-removable property for differentiating SD card and eMMC */ + if (dev_read_bool(dev, "non-removable")) + host->dev_index = 0; + else + host->dev_index = 1; + + host->priv = priv; - /* Add the mmc channel to be registered with mmc core */ - if (add_dwmci(host, DWMMC_MAX_FREQ, DWMMC_MIN_FREQ)) { - printf("DWMMC%d registration failed\n", index); - return -1; - } return 0; } -/* - * This function adds the mmc channel to be registered with mmc core. - * index - mmc channel number. - * regbase - register base address of mmc channel specified in 'index'. - * bus_width - operating bus width of mmc channel specified in 'index'. - */ -int hi6220_dwmci_add_port(int index, u32 regbase, int bus_width) +static int hi6220_dwmmc_probe(struct udevice *dev) { - struct dwmci_host *host = NULL; + struct hi6220_dwmmc_plat *plat = dev_get_platdata(dev); + struct mmc_uclass_priv *upriv = dev_get_uclass_priv(dev); + struct hi6220_dwmmc_priv_data *priv = dev_get_priv(dev); + struct dwmci_host *host = &priv->host; - host = calloc(1, sizeof(struct dwmci_host)); - if (!host) { - pr_err("dwmci_host calloc failed!\n"); - return -ENOMEM; - } + /* Use default bus speed due to absence of clk driver */ + host->bus_hz = 50000000; - host->ioaddr = (void *)(ulong)regbase; - host->buswidth = bus_width; - host->bus_hz = MMC0_DEFAULT_FREQ; + dwmci_setup_cfg(&plat->cfg, host, host->bus_hz, 400000); + host->mmc = &plat->mmc; - return hi6220_dwmci_core_init(host, index); + host->mmc->priv = &priv->host; + upriv->mmc = host->mmc; + host->mmc->dev = dev; + + return dwmci_probe(dev); } + +static int hi6220_dwmmc_bind(struct udevice *dev) +{ + struct hi6220_dwmmc_plat *plat = dev_get_platdata(dev); + int ret; + + ret = dwmci_bind(dev, &plat->mmc, &plat->cfg); + if (ret) + return ret; + + return 0; +} + +static const struct udevice_id hi6220_dwmmc_ids[] = { + { .compatible = "hisilicon,hi6220-dw-mshc" }, + { } +}; + +U_BOOT_DRIVER(hi6220_dwmmc_drv) = { + .name = "hi6220_dwmmc", + .id = UCLASS_MMC, + .of_match = hi6220_dwmmc_ids, + .ofdata_to_platdata = hi6220_dwmmc_ofdata_to_platdata, + .ops = &dm_dwmci_ops, + .bind = hi6220_dwmmc_bind, + .probe = hi6220_dwmmc_probe, + .priv_auto_alloc_size = sizeof(struct hi6220_dwmmc_priv_data), + .platdata_auto_alloc_size = sizeof(struct hi6220_dwmmc_plat), +};