diff mbox series

[005/108] tpm: cr50: Use the correct GPIO binding

Message ID 20200126220508.5.Iffff549a1b63fedb9e8ec87cdc5e9e28478a4587@changeid
State Superseded
Headers show
Series RFC: dm: Add programatic generation of ACPI tables | expand

Commit Message

Simon Glass Jan. 27, 2020, 5:05 a.m. UTC
This device should use ready-gpios rather than ready-gpio. Fix it.

Signed-off-by: Simon Glass <sjg at chromium.org>
---

 arch/x86/dts/chromebook_coral.dts                               | 2 +-
 doc/device-tree-bindings/gpio/intel,apl-gpio.txt                | 2 +-
 .../interrupt-controller/intel,acpi-gpe.txt                     | 2 +-
 drivers/tpm/cr50_i2c.c                                          | 2 +-
 4 files changed, 4 insertions(+), 4 deletions(-)

Comments

Simon Glass March 9, 2020, 3:26 a.m. UTC | #1
Hi Bin,

On Sat, 8 Feb 2020 at 07:53, Bin Meng <bmeng.cn at gmail.com> wrote:
>
> On Mon, Jan 27, 2020 at 1:08 PM Simon Glass <sjg at chromium.org> wrote:
> >
> > This device should use ready-gpios rather than ready-gpio. Fix it.
>
> Where does this requirement come from? Is this coming from the Linux
> kernel bindings?

Yes it seems to be the way things are done in Linux.

>
> >
> > Signed-off-by: Simon Glass <sjg at chromium.org>
> > ---
> >
> >  arch/x86/dts/chromebook_coral.dts                               | 2 +-
> >  doc/device-tree-bindings/gpio/intel,apl-gpio.txt                | 2 +-
> >  .../interrupt-controller/intel,acpi-gpe.txt                     | 2 +-
> >  drivers/tpm/cr50_i2c.c                                          | 2 +-
> >  4 files changed, 4 insertions(+), 4 deletions(-)
> >
>
> Reviewed-by: Bin Meng <bmeng.cn at gmail.com>

Regards,
Simon
diff mbox series

Patch

diff --git a/arch/x86/dts/chromebook_coral.dts b/arch/x86/dts/chromebook_coral.dts
index 4e8c0a6c8a..7ba38d7791 100644
--- a/arch/x86/dts/chromebook_coral.dts
+++ b/arch/x86/dts/chromebook_coral.dts
@@ -292,7 +292,7 @@ 
 				reg = <0x50>;
 				compatible = "google,cr50";
 				u-boot,i2c-offset-len = <0>;
-				ready-gpio = <&gpio_n 28 GPIO_ACTIVE_LOW>;
+				ready-gpios = <&gpio_n 28 GPIO_ACTIVE_LOW>;
 				interrupts-extended = <&acpi_gpe 0x3c 0>;
 			};
 		};
diff --git a/doc/device-tree-bindings/gpio/intel,apl-gpio.txt b/doc/device-tree-bindings/gpio/intel,apl-gpio.txt
index e27a40b437..e12dc37233 100644
--- a/doc/device-tree-bindings/gpio/intel,apl-gpio.txt
+++ b/doc/device-tree-bindings/gpio/intel,apl-gpio.txt
@@ -47,7 +47,7 @@  Example:
 			reg = <0x50>;
 			compatible = "google,cr50";
 			u-boot,i2c-offset-len = <0>;
-			ready-gpio = <&gpio_n GPIO_28 GPIO_ACTIVE_LOW>;
+			ready-gpios = <&gpio_n GPIO_28 GPIO_ACTIVE_LOW>;
 		};
 	};
 
diff --git a/doc/device-tree-bindings/interrupt-controller/intel,acpi-gpe.txt b/doc/device-tree-bindings/interrupt-controller/intel,acpi-gpe.txt
index d9252bf29f..2fe02d8a22 100644
--- a/doc/device-tree-bindings/interrupt-controller/intel,acpi-gpe.txt
+++ b/doc/device-tree-bindings/interrupt-controller/intel,acpi-gpe.txt
@@ -25,6 +25,6 @@  Example:
 	tpm at 50 {
 		reg = <0x50>;
 		compatible = "google,cr50";
-		ready-gpio = <&gpio_n 0x1c GPIO_ACTIVE_LOW>;
+		ready-gpios = <&gpio_n 0x1c GPIO_ACTIVE_LOW>;
 		interrupts-extended = <&acpi_gpe 0x3c 0>;
 	};
diff --git a/drivers/tpm/cr50_i2c.c b/drivers/tpm/cr50_i2c.c
index 1af943d6ff..d68534e7a9 100644
--- a/drivers/tpm/cr50_i2c.c
+++ b/drivers/tpm/cr50_i2c.c
@@ -608,7 +608,7 @@  static int cr50_i2c_ofdata_to_platdata(struct udevice *dev)
 		priv->irq = irq;
 		priv->use_irq = true;
 	} else {
-		ret = gpio_request_by_name(dev, "ready-gpio", 0,
+		ret = gpio_request_by_name(dev, "ready-gpios", 0,
 					   &priv->ready_gpio, GPIOD_IS_IN);
 		if (ret) {
 			log_warning("Cr50 does not have an ready GPIO/interrupt (err=%d)\n",