| Message ID | 20200228210552.615672-24-seanga2@gmail.com |
|---|---|
| State | New |
| Headers | show |
| Series | riscv: Add Sipeed Maix support | expand |
This patch should not be included. I meant to remove it (and it gets reverted in the next patch), but I made an error during rebasing. Sorry for any confustion. --Sean
diff --git a/drivers/spi/designware_spi.c b/drivers/spi/designware_spi.c index 613eb0d0e6..b80e99ee7f 100644 --- a/drivers/spi/designware_spi.c +++ b/drivers/spi/designware_spi.c @@ -427,7 +427,8 @@ static int dw_spi_xfer(struct udevice *dev, unsigned int bitlen, priv->tx = (void *)tx; priv->tx_end = priv->tx + priv->len; priv->rx = rx; - priv->rx_end = priv->rx + priv->len; + /* If we aren't recieving, rx_end needs to be valid for tx_max() */ + priv->rx_end = priv->rx + (rx ? priv->len : 0); /* Disable controller before writing control registers */ spi_enable_chip(priv, 0);
The difference between rx and rx_end is used by tx_max when calculating how much to write. If we aren't reading anything, this could cause us to let the tx fifo bottom out. Signed-off-by: Sean Anderson <seanga2 at gmail.com> --- Changes in v5: - New drivers/spi/designware_spi.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-)