From patchwork Mon Apr 20 08:46:18 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Tan, Ley Foon" X-Patchwork-Id: 238072 List-Id: U-Boot discussion From: ley.foon.tan at intel.com (Ley Foon Tan) Date: Mon, 20 Apr 2020 16:46:18 +0800 Subject: [PATCH v2 1/7] ddr: altera: arria10: Fix incorrect address for mpu1 In-Reply-To: <20200420084624.110026-1-ley.foon.tan@intel.com> References: <20200420084624.110026-1-ley.foon.tan@intel.com> Message-ID: <20200420084624.110026-2-ley.foon.tan@intel.com> SOCFPGA_SDR_FIREWALL_MPU_FPGA_ADDRESS is added in SOCFPGA_SDR_FIREWALL_MPU_FPGA_ADDRESS_OFFSET() macro already. Remove extra SOCFPGA_SDR_FIREWALL_MPU_FPGA_ADDRESS in mpu1 address computation. Signed-off-by: Ley Foon Tan --- v2: - Update commit description --- drivers/ddr/altera/sdram_arria10.c | 1 - 1 file changed, 1 deletion(-) diff --git a/drivers/ddr/altera/sdram_arria10.c b/drivers/ddr/altera/sdram_arria10.c index 2fd50b7ae550..e0779b810fdc 100644 --- a/drivers/ddr/altera/sdram_arria10.c +++ b/drivers/ddr/altera/sdram_arria10.c @@ -470,7 +470,6 @@ const struct firewall_entry firewall_table[] = { }, { "mpu1", - SOCFPGA_SDR_FIREWALL_MPU_FPGA_ADDRESS + SOCFPGA_SDR_FIREWALL_MPU_FPGA_ADDRESS_OFFSET(mpuregion1addr), SOCFPGA_SDR_FIREWALL_MPU_FPGA_ADDRESS_OFFSET(enable), ALT_NOC_FW_DDR_SCR_EN_MPUREG1EN_SET_MSK